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EV8380 Datasheet, PDF (16/29 Pages) CML Microcircuits – Family Radio Processor
Evaluation Kit for CMX838 Family Radio Processor
16
EV8380 User Manual
RX SETUP SEQUENCE:
1) Write $40 to SYNTHESIZER BASEBAND CLOCK CONTROL ($89) register:
a. Baseband clock source supplied from external crystal.
b. Bits 5-3 are “don’t care”, as CMX838 RF synthesizer clock is not used for baseband clock
generation.
c. 4.0MHz crystal oscillator used for baseband clock generation.
9) Write $3F to SETUP ($80) register:
a. Rx Enabled
b. RXIN selected as input signal source
c. HPF output passed to deviation limiter input
d. Rx O/P enabled (this bit should be set to 1 for CMX838 engineering samples)
10) Write $1F to AUDIO CONTROL ($81) register:
a. First stage of audio filtering configured for pre-emphasis response
b. Audio signal routed through HPF
c. Audio level (gain stage between pre-emphasis/LPF and HPF) set to +7.5dB
11) Write $99 to RX AUDIO LEVEL CONTROL ($82) register:
a. Deviation limiter is bypassed
b. Audio signal is passed through post-deviation limiter LPF & de-emphasis network
c. Rx volume control set to +3.0dB
12) Write $54 to AUDIO POWER AND BANDWIDTH CONTROL ($83) register:
a. Modulation digitally controlled amplifiers (DCA) and microphone amplifier configured for low
power consumption
b. Audio filters, deviation limiter, and audio level DCA configured for low power consumption
c. De-emphasis network and Rx Audio Out DCA configured for low power consumption
d. Post-deviation limiter LPF set to wide setting
e. Bit 0 is unused
13) Write $0000 to TX MOD 1 & 2 CONTROL ($88) register:
a. Tx Mod 2 output set to Vbias
b. Tx Mod 2 output gain set to off
c. Tx Mod 1 output set to Vbias
d. Tx Mod 1 output gain set to off
14) Write $44 to SYNTHESIZER GENERAL CONTROL ($8A) register:
a. Synthesizer is enabled
b. Lock detect IRQ is masked
c. Magnitude of charge pump current is 40*Iset
d. Positive VCO gain slope
e. FRS channels selected
15) Write $01 to SYNTHESIZER CHANNEL SELECT ($8B) register:
a. Bits 7 and 6 should always be set to zero
b. Lock detect comparison window set to +/- 20ns
c. FRS channel 1 selected
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