EV8380 Datasheet, PDF (15/29 Pages) CML Microcircuits – Family Radio Processor

Evaluation Kit for CMX838 Family Radio Processor
15
EV8380 User Manual
TX SETUP SEQUENCE
1) Write $40 to SYNTHESIZER BASEBAND CLOCK CONTROL ($89) register:
a. Baseband clock source supplied from external crystal.
b. Bits 5-2 are “don’t care”, as CMX838 RF synthesizer clock is not used for baseband clock
generation.
c. 4.0MHz crystal oscillator used for baseband clock generation.
2) Write $FF to SETUP ($80) register:
a. Tx enabled.
b. Microphone amplifier output signal passed through “Audio Input 1 Select” switch to pre-
emphasis/LPF network.
c. Audio signal passed from HPF network output to LPF/limiter input.
d. Audio signal is not passed to de-emphasis network
3) Write $1F to AUDIO CONTROL ($81) register:
a. First stage of audio filtering configured for pre-emphasis response.
b. Audio signal is passed through HPF.
c. Audio level (gain stage between pre-emphasis/LPF and HPF) set to +7.5dB.
4) Write $17 to RX AUDIO LEVEL CONTROL ($82) register:
a. Audio signal is passed through deviation limiter and post-deviation limiter LPF.
b. De-emphasis network is not bypassed.
c. Volume control set to 0.0dB.
5) Write $54 to AUDIO POWER & BANDWIDTH CONTROL ($83) register:
a. Low power operation for modulation digitally controlled amplifiers (DCA) and microphone
amplifier.
b. Low power operation for audio filters, deviation limiter, and audio level DCA.
c. Low power operation for de-emphasis network and Rx Audio Out DCA.
d. Post-deviation limiter LPF configured for wideband output.
6) Write $5035 to TX MOD 1 & 2 CONTROL ($88) register:
a. Subaudio signal presented on MOD2 output.
b. MOD2 output level set to 0.0dB.
c. Audio tone presented on MOD1 output.
d. MOD1 output level set to +2.5dB.
7) Write $44 to SYNTHESIZER GENERAL CONTROL ($8A) register:
a. Synthesizer is enabled.
b. Lock detect IRQ is masked
c. Magnitude of charge pump current is 40* I_SET.
d. Positive slope for VCO gain
e. FRS radio service selected
8) Write $01 to SYNTHESIZER CHANNEL SELECT ($8B) register:
a. Bits 7 and 6 set to zero.
b. Lock detect comparison window set to +/- 20ns.
c. FRS channel 1 selected.
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