M-8880 Datasheet, PDF (6/13 Pages) Clare, Inc. – M-8880 DTMF Transceiver

M-8880
registers on powerup; however, as a precautionary measure the
initialization software should include a routine to clear the regis-
ters. Refer to Tables 3 and 4 for details on the control registers.
The IRQ/CP pin can be programmed to provide an interrupt re-
quest signal on validation of DTMF signals, or when the trans-
mitter is ready for more data (burst mode only). The IRQ/CP pin
is configured as an open-drain output device and as such re-
quires a pullup resistor (see Figure 10).
Ordering Information
M-888001P
M-8880-01SM
M-8880-01T
20-pin plastic DIP
20-pin plastic SOIC
20-pin plastic SOIC,Tape and Reel
Figure 9 Equations
Table 6 Internal Register Functions
RS0
R/W
Function
0
0
Write to transmitter
0
1
Read from receiver
1
0
Write to control register
1
1
Read from status register
b3
RSEL
Table 7 CRA Bit Postions
b2
b1
IRQ
CP/DTMF
b0
TOUT
Table 8 CRB Bit Positions
b3
b2
b1
b0
C/R
S/D
TEST
BURST
Figure 10 Application Circuit (Single-Ended Input)
40-406-00012, Rev. G
Page 6
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