M-8880 Datasheet, PDF (3/13 Pages) Clare, Inc. – M-8880 DTMF Transceiver

M-8880
causes V_C (see Figure 5) to rise as the capacitor discharges.
Provided that the signal condition is maintained (ESt remains
high) for the validation period (t_GTP), V_C reaches the threshold
(V_TSt) of the steering logic to register the tone pair, latching its
corresponding 4-bit code (see Table 2) into the receive data reg-
ister.
Table 2 Tone Encoding/Decoding
F_LOW F_HIGH Digit
D3
D2
D1
D0
697 1209
1
0
0
0
1
697 1336
2
0
0
1
0
697 1477
3
0
0
1
1
770 1209
4
0
1
0
0
770 1336
5
0
1
0
1
770 1477
6
0
1
1
0
852 1209
7
0
1
1
1
852 1336
8
1
0
0
0
852 1477
9
1
0
0
1
941 1336
0
1
0
1
0
941 1209
*
1
0
1
1
941 1477
#
1
1
0
0
697 1633
A
1
1
0
1
770 1633
B
1
1
1
0
852 1633
C
1
1
1
1
941 1633
D
0
0
0
0
0 = logic low, 1 = logic high
At this point the StGT output is activated and drives V_C to V_DD.
StGT continues to drive high as long as ESt remains high.
Finally, after a short delay to allow the output latch to settle, the
delayed steering output flag goes high, signaling that a received
tone pair has been registered. It is possible to monitor the status
of the delayed steering flag by checking the appropriate bit in the
status register. If interrupt mode has been selected, the IRQ/CP
pin will pull low when the delayed steering flag is active.
The steering circuit works in reverse to validate the interdigit
pause between signals. Thus, as well as rejecting signals too
short to be considered valid, the receiver will tolerate signal in-
terruptions (dropout) too short to be considered a valid pause.
This capability, together with the ability to select the steering
time constants externally, allows the designer to tailor perfor-
mance to meet a wide variety of system requirements.
Guard Time Adjustment: The simple steering circuit shown in
Figure 5 is adequate for most applications. Component values
are chosen according to the formula:
t_REC = t_DP + t_GTP
T_ID = t_DA + t_GTA
The value of t_DP is a device parameter and t_REC is the minimum
signal duration to be recognized by the receiver. A value for C1
of 0.1 µF is recommended for most applications, leaving R1 to
be selected by the designer. Different steering arrangements
may be used to select independently the guard times for tone
present (t_GTP) and tone absent (t_GTA). This may be necessary to
meet system specifications that place both accept and reject
limits on both tone duration and interdigit pause. Guard time ad-
justment also allows the designer to tailor system parameters
such as talkoff and noise immunity. Increasing t_REC improves
talkoff performance since it reduces the probability that tones
simulated by speech will maintain signal condition long enough
to be registered. Alternatively, a relatively short t_REC with a long
t_DO would be appropriate for extremely noisy environments
where fast acquisition time and immunity to tone dropouts are
required. Design information for guard time adjustment is shown
in Figure 6.
Figure 5 Basic Steering Circuit
The contents of the output latch are updated on an active de-
layed steering transition. This data is presented to the 4-bit
bidirectional data bus when the receive data register is read.
Figure 6 Guard Time Adjustment
Call Progress Filter
A call progress (CP) mode can be selected, allowing the detec-
tion of various tones that identify the progress of a telephone call
on the network. The call progress tone input and DTMF input are
common; however, call progress tones can only be detected
when the CP mode has been selected. DTMF signals cannot be
40-406-00012, Rev. G
Page 3
www.clare.com