WM8326 Datasheet, PDF (67/255 Pages) Wolfson Microelectronics plc – Processor Power Management Subsystem

Production Data
WM8326
Note that, when DC-DC3 and DC-DC4 are operating in dual mode, then discontinuous conduction
mode operation is not possible. If the selected operating mode of DC-DC3 is Auto mode (Continuous
/ Discontinuous Conduction with Pulse Skipping), then Forced Continuous Conduction mode (FCCM)
will be implemented.
In Forced Continuous Conduction mode, the dual ganged converters support an increased current
capability, as detailed in the Electrical Characteristics - see Section 7.1. In the Hysteretic and LDO
operating modes, the current limit of the dual-ganged converters is the same as for a single buck
converter, DC-DC3.
15.7 LDO REGULATOR CONTROL
The LDO Regulators 1-10 can be configured to act as Current Limited Switches by setting the
LDOn_SWI field. When this bit is selected, there is no voltage regulation and the operating mode and
output voltage controls of the corresponding LDO are ignored. In Switch mode, the switch is enabled
(closed) and disabled (opened) by enabling or disabling the LDO.
Note that Switch mode cannot be selected via the OTP memory settings, and must be configured
after the WM8326 has entered the ON state.
When the LDO Regulator is disabled (and Switch mode is not selected), the output pin can be
configured to be floating or to be actively discharged. This is selected using LDOn_FLT.
15.8 HARDWARE CONTROL (GPIO)
The DC-DC Converters, LDO Regulators and EPE outputs may be controlled by the Hardware
Control inputs supported via the GPIO pins. The DCm_HWC_SRC, LDOn_HWC_SRC or
EPEn_HWC_SRC fields determine which of these Hardware Control inputs is effective.
See Section 21 for details of configuring the GPIO pins as Hardware Control inputs. Note that the
GPIO Hardware Control function is not the same as the GPIO Hardware Enable function.
Hardware Control is only possible when the applicable DCm_ENA, LDOn_ENA or EPEn_ENA control
bit is set (see Section 15.2), or if a Hardware Enable has been assigned to the relevant function and
is asserted.
The action taken in response to the selected Hardware Control inputs is configurable for each DC-DC
Converter, LDO Regulator or EPE output. The available options are described below.
When a Hardware Control input is assigned to a DC-DC Buck Converter, and is asserted, the
operating mode and output voltage of the relevant DC-DC Converter is determined by the
DCm_HWC_VSEL and DCm_HWC_MODE fields; this takes precedence over the normal ON or
SLEEP settings.
Note that the Hardware Control input can be used to disable a DC-DC Buck Converter if required, by
setting DCm_HWC_MODE = 01.
When a Hardware Control input is assigned to LDO Regulators 1-10, and is asserted, the operating
mode and output voltage of the relevant LDO Regulators is determined by the LDOn_HWC_VSEL
and LDOn_HWC_MODE fields; this takes precedence over the normal ON or SLEEP settings.
Note that, for the standard LDOs (LDO1 - LDO6), when Low Power Mode is selected
(LDOn_HWC_MODE = 00 or 10), then the Low Power mode type is determined by the
LDOn_LP_MODE register bits.
When a Hardware Control input is assigned to the External Power Enable (EPE) outputs, and is
asserted, the relevant EPE outputs are controlled as determined by the EPEn_HWC_ENA field; this
takes precedence over the normal ON or SLEEP settings. The available options are to de-assert the
EPE, or for the EPE to remain under control of EPEn_ENA.
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PD, June 2012, Rev 4.0
67