WM8326 Datasheet, PDF (113/255 Pages) Wolfson Microelectronics plc – Processor Power Management Subsystem

Production Data
ADDRESS
BIT
LABEL
R16396
(400Ch)
GPIO Level
11 GP12_LVL
10 GP11_LVL
9
GP10_LVL
8
GP9_LVL
7
GP8_LVL
6
GP7_LVL
5
GP6_LVL
4
GP5_LVL
3
GP4_LVL
2
GP3_LVL
1
GP2_LVL
0
GP1_LVL
Table 55 GPIO Level Register
WM8326
DEFAULT
0
0
0
0
0
0
0
0
0
0
0
0
DESCRIPTION
GPIOn level.
When GPn_FN = 0h and GPn_DIR
= 0, write to this bit to set a GPIO
output.
Read from this bit to read GPIO
input level.
When GPn_POL is 0, the register
contains the opposite logic level to
the external pin.
The power domain for each GPIO is controlled using the GPn_PWR_DOM registers as described in
Table 56.
The selected power domain for each GPIO affects the maximum input voltage that can be supported
on the respective pin(s). Note that this is also applicable when GPIO10, GPIO11 or GPIO12 are used
as inputs to the AUXADC (see Section 18). The input voltage at the GPIO pin must not exceed the
voltage of the respective power domain.
ADDRESS
R16440
(4038h)
GPIO1 Control
R16441
(4039h)
GPIO2 Control
R16442
(403Ah)
GPIO3 Control
R16443
(403Bh)
GPIO4 Control
R16444
(403Ch)
GPIO5 Control
R16445
(403Dh)
GPIO6 Control
R16446
(403Eh)
GPIO7 Control
R16447
(403Fh)
GPIO8 Control
R16448
(4040h)
GPIO9 Control
R16449
(4041h)
GPIO10
BIT
LABEL
DEFAULT
DESCRIPTION
11 GP1_PWR_DO
0
GPIO1 Power Domain select
M
0 = DBVDD
1 = VPMIC (LDO12)
11 GP2_PWR_DO
0
GPIO2 Power Domain select
M
0 = DBVDD
1 = VPMIC (LDO12)
11 GP3_PWR_DO
0
GPIO3 Power Domain select
M
0 = DBVDD
1 = VPMIC (LDO12)
11 GP4_PWR_DO
0
GPIO4 Power Domain select
M
0 = DBVDD
1 = PVDD
11 GP5_PWR_DO
0
GPIO5 Power Domain select
M
0 = DBVDD
1 = PVDD
11 GP6_PWR_DO
0
GPIO6 Power Domain select
M
0 = DBVDD
1 = PVDD
11 GP7_PWR_DO
0
GPIO7 Power Domain select
M
0 = DBVDD
1 = VPMIC (LDO12)
11 GP8_PWR_DO
0
GPIO8 Power Domain select
M
0 = DBVDD
1 = VPMIC (LDO12)
11 GP9_PWR_DO
0
GPIO9 Power Domain select
M
0 = DBVDD
1 = VPMIC (LDO12)
11 GP10_PWR_D
OM
0
GPIO10 Power Domain select
0 = DBVDD
1 = PVDD
w
PD, June 2012, Rev 4.0
113