CS42516_05 Datasheet, PDF (63/91 Pages) Cirrus Logic – 110 dB, 192 kHz 6-Ch Codec with S/PDIF Receiver

6.19 Receiver Mode Control 2 (address 1Fh)
7
Reserved
6
TMUX2
5
TMUX1
4
TMUX0
3
Reserved
2
RMUX2
CS42516
1
RMUX1
0
RMUX0
6.19.1 TXP MULTIPLEXER (TMUXX)
Default = 000
Function:
Selects which of the eight receiver inputs will be mapped directly to the TXP output pin.
TMUX2
0
0
0
0
1
1
1
1
TMUX1
0
0
1
1
0
0
1
1
TMUX0
0
1
0
1
0
1
0
1
Description
Output from pin RXP0
Output from pin RXP1
Output from pin RXP2
Output from pin RXP3
Output from pin RXP4
Output from pin RXP5
Output from pin RXP6
Output from pin RXP7
Table 18. TXP Output Selection
6.19.2 RECEIVER MULTIPLEXER (RMUXX)
Default = 000
Function:
Selects which of the eight receiver inputs will be mapped to the internal receiver.
RMUX2
0
0
0
0
1
1
1
1
RMUX1
0
0
1
1
0
0
1
1
RMUX0
0
1
0
1
0
1
0
1
Description
Input from pin RXP0
Input from pin RXP1
Input from pin RXP2
Input from pin RXP3
Input from pin RXP4
Input from pin RXP5
Input from pin RXP6
Input from pin RXP7
Table 19. Receiver Input Selection
6.20 Interrupt Status (address 20h) (Read Only)
7
UNLOCK
6
Reserved
5
QCH
4
DETC
3
DETU
2
Reserved
1
OverFlow
0
RERR
For all bits in this register, a “1” means the associated interrupt condition has occurred at least once since the reg-
ister was last read. A ”0” means the associated interrupt condition has NOT occurred since the last reading of the
register. Reading the register resets all bits to 0. Status bits that are masked off in the associated mask register will
always be “0” in this register.
DS583F1
63