CS42L51 Datasheet, PDF (57/83 Pages) Cirrus Logic – Low Power, Stereo CODEC with Headphone Amp

CS42L51
ALCX Zero Cross Disable (ALCX_ZCDIS)
Default: 0
0 - Off
1 - On
Function:
Overrides the ZCROSSx bit setting for the ADC. When this bit is set, the ALC attack rate in the PGA will not
be dictated by the zero cross setting. ALC volume level changes will take effect immediately in one step.
PGA X Gain Control (PGAX_VOL[4:0])
Default: 00000
Binary Code
11000
···
01010
···
00000
11111
11110
···
11010
Volume Setting
+12 dB
···
+5 dB
···
0 dB
-0.5 dB
-1 dB
···
-3 dB
Function:
The PGAx Gain Control register allows independent setting of the signal levels in 0.5 dB increments as dic-
tated by the ADCx Soft and Zero Cross bits (SOFTx & ZCROSSx) from +12 dB to -3 dB. Gain settings are
decoded as shown in the table above. The gain changes are implemented as dictated by the ALCX Soft &
Zero Cross bits (ALCX_SZC). Levels are decoded as described in the table above.
Note: When the ALC is enabled the PGA is automatically controlled and should not be adjusted manually.
6.11 ADCx Attenuator:
ADCA (Address 0Ch) & ADCB (Address 0Dh)
7
6
5
4
3
ADCx_ATT7 ADCx_ATT6 ADCx_ATT5 ADCx_ATT4 ADCx_ATT3
2
ADCx_ATT2
1
ADCx_ATT1
0
ADCx_ATT0
ADCX Attenuation Control (ADCX_ATT[7:0])
Default: 00h
Binary Code
0111 1111
···
0000 0000
1111 1111
1111 1110
···
1010 0000
···
1000 0000
Volume Setting
0 dB
···
0 dB
-1 dB
-2 dB
···
-96 dB
···
-96 dB
Function:
The level of ADCX can be adjusted in 1.0 dB increments as dictated by the ADCx Soft and Zero Cross bits
DS679A2
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