CDB5345 Datasheet, PDF (4/27 Pages) Cirrus Logic – Evaluation Board for CS5345

CDB5345
1. SYSTEM OVERVIEW
The CDB5345 evaluation board is an excellent means for evaluating the CS5345 ADC. Analog and digital audio sig-
nal interfaces are provided, an on-board FPGA is used for easily configuring the evaluation platform, and a 9-pin
serial cable is included for use with the supplied Windows^® configuration software.
The CDB5345 schematic set is shown in Figures 4 through 11. The CDB5345 is assembled on the printed wire
board designed for the CDB4245, with a number of components un-populated. These un-populated components
have been removed from the included schematic set for clarity. For a complete schematic set, see the CDB4245
data sheet.
1.1 Power
Power must be supplied to the evaluation board through the red +5.0 V binding post. On-board regulators
provide 3.3 V, 2.5 V, and 1.8 V supplies. Appropriate supply levels for powering VA, VD, VLS, and VLC are
set by a series of jumpers (see Table 5 on page 14). All voltage inputs must be referenced to the single black
binding post ground connector (see Table 4 on page 13).
WARNING: Please refer to the CS5345 data sheet for allowable voltage levels.
1.2 Grounding and Power Supply Decoupling
The CS5345 requires careful attention to power supply and grounding arrangements to optimize perfor-
mance. Figure 3 on page 15 provides an overview of the connections to the CS5345. Figure 12 on page 24
shows the component placement. Figure 13 on page 25 shows the top layout. Figure 14 on page 26 shows
the bottom layout. The decoupling capacitors are located as close to the CS5345 as possible. Extensive use
of ground plane fill in the evaluation board yields large reductions in radiated noise.
1.3 CS5345 Audio ADC
A complete description of the CS5345 is included in the CS5345 product data sheet.
The required configuration settings of the CS5345 are made in its control port registers, accessible through
the CS5345 tab of the Cirrus Logic FlexGUI software.
Clock and data source selections are made through the control port of the FPGA. Basic routing selections
can be made using the CS5345 Controls tab in the GUI software application. Advanced options are acces-
sible through the Board Configuration sub-tab on the Register Maps tab of the Cirrus Logic FlexGUI soft-
ware. Refer to the FPGA register descriptions sections beginning on page 11.
1.4 CS8406 Digital Audio Transmitter
A complete description of the CS8406 transmitter (Figure 7 on page 19) and a discussion of the digital audio
interface are included in the CS8406 data sheet.
The CS8406 converts the PCM data generated by the CS5345 to the standard S/PDIF data stream. The
CS8406 can operate in either master or slave mode, accepts 128 Fs, 256 Fs, 384 Fs, and 512 Fs master
clocks on the OMCK input pin, and can operate in the Left-Justified, I²S, Right-Justified 16-bit, and Right-
Justified 24-bit interface formats.
The most common operations of the CS8406 may be controlled via the CDB5345 Controls tab in the GUI
software application. Advanced options are accessible through the CS8406 sub-tab on the Register Maps
tab of the Cirrus Logic FlexGUI software.
1.5 FPGA
The FPGA handles both clock and data routing on the CDB5345. Clock and data routing selections made
via the CDB5345 Controls tab in the GUI will be handled by the FPGA with no user intervention required.
For advanced information regarding the internal registers and operation of the FPGA, see sections 4 and 5
beginning on page 10.
1.6 Canned Oscillator
A canned oscillator, Y1, is available to provide a master clock source to the CDB5345.
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