CS4349 Datasheet, PDF (35/40 Pages) Cirrus Logic – 192 kHz DAC w/ Volume Control and 1 Vrms @ 3.3 V

8.7 Misc. Control - Register 08h
7
PDN
0
6
Reserved
0
5
FREEZE
0
4
POPG_EN
1
3
Reserved
1
2
Reserved
1
1
Reserved
0
CS4349
0
Reserved
0
8.7.1
Power Down (PDN) Bit 7
Function:
When set to 1, the entire device enters a low-power state, and the contents of the control registers is re-
tained. The power-down bit defaults to ‘0’ on power-up.
8.7.2
Freeze Controls (FREEZE) Bit 5
Function:
When set to 1, this function allows modifications to be made to the registers without the changes taking
effect until FREEZE is set back to 0. To make multiple changes in the Control Port registers take effect
simultaneously, enable the FREEZE bit, make all register changes, then disable the FREEZE bit.
When set to 0 (default), register changes take effect immediately.
8.7.3
Popguard Enable (POPG_EN) Bit 4
Function:
When set to 1, (default) the Device initiates a ramping function as outlined in Section 4.7 on page 22.
When set to 0, the outputs step to VQ upon release of PDN.
DS782F1
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