CS4349 Datasheet, PDF (18/40 Pages) Cirrus Logic – 192 kHz DAC w/ Volume Control and 1 Vrms @ 3.3 V

4. APPLICATIONS
CS4349
4.1 Sample Rate Range and Oversampling Mode Detect
The device operates in one of three oversampling modes based on the input sample rate. In Control Port
Mode, the allowed sample rate range in each mode will depend on how the FM[1:0] bits are configured. In
Stand-Alone Mode, the sample rate range will be according to Table 1.
4.1.1
Sample Rate Auto-Detect
The Auto-Detect feature is enabled by default. In this state, the CS4349 will auto-detect the correct mode
when the input sample rate (Fs), defined by the LRCK frequency, falls within one of the ranges shown in
Table 1. Sample rates outside the specified range for each mode are not supported when Auto-Detect is
enabled.
Input Sample Rate (Fs)
30 kHz - 54 kHz
60 kHz - 108 kHz
120 kHz - 216 kHz
Table 1. CS4349 Auto-Detect
Mode
Single-Speed Mode
Double-Speed Mode
Quad-Speed Mode
In Control Port Mode, the Auto-Detect feature can be disabled by the Functional Mode (FM[1:0]) bits in
the control port register 02h. In this state, the CS4349 will not auto-detect the correct mode based on the
input sample rate (Fs). The operational mode must then be set manually according to one of the ranges
referred to in Section 8.2.3. Sample rates outside the specified range for each mode are not supported.
In Stand-Alone Mode, it is not possible to disable auto-detect of sample rates.
4.2 System Clocking
The device requires external generation of the left/right (LRCK) and serial (SCLK) clocks. The left/right
clock, defined also as the input sample rate (F_s).
Refer to Section 4.3 for the required SCLK-to-LRCK timing associated with the selected digital interface for-
mat, and “Switching Specifications - Serial Audio Interface” on page 13 for the maximum allowed clock fre-
quencies.
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