CS4349 Datasheet, PDF (21/40 Pages) Cirrus Logic – 192 kHz DAC w/ Volume Control and 1 Vrms @ 3.3 V

CS4349
4.4 De-Emphasis
The device includes on-chip digital de-emphasis. Figure 16 shows the de-emphasis curve for Fs equal to
44.1 kHz. The frequency response of the de-emphasis curve scales proportionally with changes in sample
rate, Fs.
Gain
dB
T1=50 µs
0dB
-10dB
T2 = 15 µs
F1
3.183 kHz
F2 Frequency
10.61 kHz
Figure 16. De-Emphasis Curve
Note: De-emphasis is only available in Single-Speed Mode.
4.5 Mute Control
The mute control pins (AMUTEC and BMUTEC) go active during power-up initialization, reset, muting (see
Section 8.4.3), and loss of LRCK. These pins are intended to be used as control for external mute circuits
to prevent the clicks and pops that can occur in any single-ended single-supply system.
Use of the mute control function is not mandatory but recommended for designs requiring the absolute min-
imum in extraneous clicks and pops. Also, use of the Mute Control function can enable the system designer
to achieve idle-channel noise and signal-to-noise ratios which are only limited by the external mute circuit.
4.6 Recommended Power-Up Sequence
4.6.1
Stand-Alone Mode
1. Hold RST low until the power supplies and configuration pins are stable, and the serial and left/right
clocks are fixed to the appropriate frequencies, as discussed in Section 4.2. In this state, the control
port registers are reset to their default settings, VQ will remain low, and VBIAS will be connected to
VA.
2. Bring RST high. The device will remain in a low power state with VQ low for approximately 512 LRCK
cycles in Single-Speed Mode (1024 LRCK cycles in Double-Speed Mode, and 2048 LRCK cycles in
Quad-Speed Mode).
3. The device will then initiate the power up sequence which lasts approximately 50 µs when the
Popguard is disabled. If the Popguard is enabled, see Section 4.7 for a complete description of
power-up timing.
DS782F1
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