CS22250 Datasheet, PDF (31/32 Pages) Cirrus Logic – WIRELESS 10BT CONTROLLER

Table 11. Radio MAC AC Timings – RFMD Modes
Parameter
t_dBBRNW
t_dnBBCS
t_dBBSDX
T_suBBSDX
T_hBBSDX
t_dTXD
t_dTXD
T_suRXD
T_hRXD
T_suMDRDY
T_hMDRDY
t_dTXPEBB
t_dRXPEBB
T_suTXRDY
T_hTXRDY
Parameter Description
Min
BBRNW output delay from falling BBSCLK
nBBCS output delay from falling BBSCLK
BBSDX output delay from falling BBSCLK
BBSDX setup to rising edge of BBSCLK
14.5
BBSDX hold from rising edge of BBSCLK
0.0
TXD output delay from rising TXCLK
(SMAC Mode)
TXD output delay from rising TXCLK
(RMAC Mode)
RXD setup to rising edge of RXCLK
1.0
RXD hold from rising edge of RXCLK
1.8
MDRDY setup to falling edge of RXCLK
2
MDRDY hold from falling edge of RXCLK
1
TXPEBB output delay from rising TXCLK
RXPEBB output delay from rising RXCLK
TXRDY setup to falling edge of TXCLK
6.5
TXRDY hold from falling edge of TXCLK
0
Max
6.7
110.79
7.0
33.5
Units
ns
ns
ns
ns
ns
ns
15.4
ns
ns
ns
ns
ns
15.0
ns
16.0
ns
ns
ns
Notes:
1.
2.
3.
4.
CCA signal is double synchronized to ARMCLKIN.
ARMCLK must be at least 4 times the TXCLK and RXCLK frequency.
TXD delay in 802.11b mode is the result of sampling the TXCLK with the ctlclk, therefore the
maximum delay is equal to two ctlclk periods plus the flop-to-output delay. In this table, ctlclk is
assumed to have a 13 ns period.
BBNCS output delay = [(1/ARMCLK freq)*ceiling(SER_CLK_DIV/2)] + 7ns, the specified value is
based on ARMCLK of 77 Mhz and SER_CLK_DIV=8.
Table 12. Package Specifications
Symbol
θ_JC
θ_JA
T_{J_MAX}
Parameter
Junction-to-Case Thermal
Resistance
Junction-to-Open Air
Thermal Resistance
Max Junction Temperature
Notes:
1. ARMCLK / MEMCLK = 77MHz
Value
2.5
26.9
105
Units
°C/W
°C/W
°C
CS22250 Wireless 10BT Controller
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