CS4360_04 Datasheet, PDF (21/37 Pages) Cirrus Logic – 24-Bit, 192 kHz 6 Channel D/A Converter

CS4360
4. APPLICATIONS
4.1 Sample Rate Range/Operational Mode Select
4.1.1 Stand-Alone Mode
The device operates in one of four operational modes determined by the Mode pins in Stand-alone mode.
Sample rates outside the specified range for each mode are not supported.
M2 M1
Input Sample Rate (F_S)
0
0 4 kHz - 50 kHz
0
1 32 kHz - 48 kHz
1
0 50 kHz - 100 kHz
1
1 100 kHz - 200 kHz
MODE
Single-Speed (without De-emphasis)
Single-Speed (with De-emphasis)
Double-Speed
Quad-Speed
Table 1. CS4360 Stand-Alone Operational Mode
4.1.2 Control Port Mode
The device operates in one of three operational modes determined by the FM bits (see section 6.1.4) in
Control Port mode. Sample rates outside the specified range for each mode are not supported.
FM1
0
0
1
1
FM0
0
1
0
1
Input Sample Rate (F_S)
4 kHz - 50 kHz
50 kHz - 100 kHz
100 kHz - 200 kHz
Reserved
Single-speed
Double-speed
Quad-speed
Reserved
MODE
Table 2. CS4360 Control Port Operational Mode
4.2 System Clocking
The device requires external generation of the master (MCLK), left/right (LRCK) and serial (SCLK) clocks.
The LRCK, defined also as the input sample rate (F_s), must be synchronously derived from the MCLK
according to specified ratios. The specified ratios of MCLK to LRCK, along with several standard audio
sample rates and the required MCLK frequency, are illustrated in Tables 3-5.
Sample Rate
(kHz)
32
44.1
48
MCLK (MHz)
256x
8.1920
11.2896
12.2880
384x
12.2880
16.9344
18.4320
512x
16.3840
22.5792
24.5760
768x
24.5760
33.8688
36.8640
Table 3. Single-speed Mode Standard Frequencies
1024x*
32.7680
45.1584
49.1520
Sample Rate
(kHz)
64
88.2
96
DS517F2
MCLK (MHz)
128x
8.1920
11.2896
12.2880
192x
12.2880
16.9344
18.4320
256x
16.3840
22.5792
24.5760
384x
24.5760
33.8688
36.8640
Table 4. Double-speed Mode Standard Frequencies
512x*
32.7680
45.1584
49.1520
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