CS4330 Datasheet, PDF (19/38 Pages) Cirrus Logic – 8 Pin Stereo D/A Converter for Digital Audio

PIN DESCRIPTIONS
SERIAL DATA INPUT
DE-EMPHASIS / SCLK
LEFT / RIGHT CLOCK
MASTER CLOCK
CS4330, CS4331, CS4333
SDATA ¹
DEM/SCLK 2
LRCK 3
MCLK 4
8 _AOUTL
7 VA+
6 AGND
5 AOUTR
ANALOG LEFT CHANNEL OUTPUT
ANALOG POWER
ANALOG GROUND
ANALOG RIGHT CHANNEL OUTPUT
Power Supply Connections
VA+ - Positive Analog Power, PIN 7.
Positive analog supply. Nominally +5V or +3V.
AGND - Analog Ground, PIN 6.
Analog ground reference.
Analog Outputs
AOUTL - Analog Left Channel Output, PIN 8.
Analog output for the left channel. Typically 3.7 Vpp for a full-scale input signal at VA+ = 5V
and 1.85 Vpp at VA+ = 3V.
AOUTR - Analog Right Channel Output, PIN 5.
Analog output for the right channel. Typically 3.7 Vpp for a full-scale input signal at VA+ = 5V
and 1.85 Vpp at VA+ = 3V.
Digital Inputs
MCLK - Master Clock Input, PIN 4.
The frequency must be 256×, 384× , or 512× the input sample rate (Fs).
LRCK - Left/Right Clock, PIN 3.
This input determines which channel is currently being input on the Audio Serial Data Input
pin, SDATA.
SDATA - Audio Serial Data Input, PIN 1.
Two’s complement MSB-first serial data is input on this pin. The data is clocked into the
CS4330, CS4331, and CS4333 via internal or external SCLK and the channel is determined by
LRCK.
DEM/SCLK - De-emphasis / External serial clock input , PIN 2.
A dual-purpose input used for de-emphasis filter control or external serial clock input.
DS136F1
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