CS4360 Datasheet, PDF (18/36 Pages) Cirrus Logic – 24-Bit, 192 kHz 6 Channel D/A Converter

CS4360
4.5.2 CONTROL PORT ENABLE (CPEN)
Default = 0
0 - Disabled
1 - Enabled
Function:
The Control Port will become active and reset to the default settings when this function is enabled.
4.5.3 POWER DOWN (PDN)
Default = 1
0 - Disabled
1 - Enabled
Function:
The entire device will enter a low-power state when this function is enabled, and the contents of the
control registers are retained in this mode. The power-down bit defaults to ‘enabled’ on power-up and
must be disabled before normal operation in Control Port mode can occur.
4.5.4 POPGUARD® TRANSIENT CONTROL (POPG)
Default = 1
0 - Disabled
1 - Enabled
Function:
The PopGuard^® Transient Control allows the quiescent voltage to slowly ramp to and from 0 volts to
the quiescent voltage during power-on or power-off when this function is enabled. Please see section
6.4 for implementation details.
4.5.5 FREEZE CONTROLS (FREEZE)
Default = 0
0 - Disabled
1 - Enabled
Function:
This function allows modifications to be made to the registers without the changes taking effect until
the FREEZE is disabled. To make multiple changes in the control port registers take effect simulta-
neously, enable the FREEZE bit, make all register changes, then disable the FREEZE bit.
4.5.6 MASTER CLOCK DIVIDE ENABLE (MCLKDIV)
Default = 0
0 - Disabled
1 - Enabled
Function:
The MCLKDIV bit enables a circuit which divides the externally applied MCLK signal by 2 prior to all
other internal circuitry.
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DS517PP1