CS4362A_08 Datasheet, PDF (17/50 Pages) Cirrus Logic – 114 dB, 192 kHz 6-Channel D/A Converter

CS4362A
SWITCHING CHARACTERISTICS - CONTROL PORT - I²C FORMAT
(Inputs: Logic 0 = GND, Logic 1 = VLC, C_L = 30 pF)
Parameter
Symbol
Min
Max
SCL Clock Frequency
f_scl
-
RST Rising Edge to Start
t_irs
500
Bus Free Time Between Transmissions
t_buf
4.7
Start Condition Hold Time (prior to first clock pulse)
t_hdst
4.0
Clock Low time
t_low
4.7
Clock High Time
t_high
4.0
Setup Time for Repeated Start Condition
t_sust
4.7
SDA Hold Time from SCL Falling
(Note 16)
t_hdd
0
SDA Setup time to SCL Rising
t_sud
250
Rise Time of SCL and SDA
t_rc, t_rc
-
Fall Time SCL and SDA
t_fc, t_fc
-
Setup Time for Stop Condition
t_susp
4.7
Acknowledge Delay from SCL Falling
t_ack
300
100
-
-
-
-
-
-
-
-
1
300
-
1000
Unit
kHz
ns
µs
µs
µs
µs
µs
µs
ns
µs
ns
µs
ns
Notes:
16. Data must be held for sufficient time to bridge the transition time, t_fc, of SCL.
RST
t _irs
Stop
S tart
SDA
t _buf
t _hdst
t _high
SCL
t
low
t
hdd
R epeated
S ta rt
t _hdst
tf
t _sud
t _sust
tr
Figure 3. Control Port Timing - I²C Format
Stop
t _susp
DS617F1
17