CS4373 Datasheet, PDF (16/20 Pages) Cirrus Logic – Low-power, High-performance Delta-Sigma Test DAC

CS4373
When using dual analog power supplies, it is
recommended to connect the VA- power
supply pin to system ground (DGND) using a
reversed biased Schottky diode. This configu-
ration clamps the VA- voltage a maximum of
0.3 V above ground to ensure SCR latch-up
does not occur during power up. If the VA+
power supply ramps before the VA- supply,
the VA- voltage could be pulled above ground
through the CS4373. If the VA- supply is unin-
tentionally pulled 0.7 V above the DGND pin,
SCR latch-up can occur.
10.3 DC-DC Converter Considerations
Many low-frequency measurement systems
are battery powered and utilize DC-DC con-
verters to efficiently generate power supply
voltages. To minimize interference effects, op-
erate the DC-DC converter at a frequency
which is rejected by the digital filter, or operate
it synchronous to the MCLK rate.
A synchronous DC-DC converter whose oper-
ating frequency is derived from MCLK will the-
oretically minimize the potential for “beat
frequencies” to appear in the measurement
bandwidth. However this requires the source
clock to remain jitter-free within the DC-DC
converter circuitry. If clock jitter can occur with-
in the DC-DC converter (as in a PLL-based ar-
chitecture), it’s better to use a non-
synchronous DC-DC converter whose switch-
ing frequency is rejected by the digital filter.
During PCB layout, do not place high-current
DC-DC converters near sensitive analog com-
ponents. Carefully routing a separate DC-DC
“star” ground will help isolate noisy switching
currents away from the sensitive analog com-
ponents.
10.4 Power Supply Rejection
Power supply rejection of the CS4373 is fre-
quency dependent. The digital filter rejects
power supply noise for frequencies above the
filter corner frequency at 130 dB or greater.
For frequencies between DC and the digital fil-
ter corner frequency, power supply rejection is
nearly constant at 90 dB.
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