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CS2100-CP Datasheet, PDF (16/32 Pages) Cirrus Logic – Fractional-N Clock Multiplier
5.3 Output to Input Frequency Ratio Configuration
CS2100-CP
5.3.1
User Defined Ratio (RUD)
The User Defined Ratio, RUD, is a 32-bit un-signed fixed-point number, stored in the Ratio register set,
which determines the basis for the desired input to output clock ratio. The 32-bit RUD can be expressed
in either a high resolution (12.20) or high multiplication (20.12) format selectable by the LFRatioCfg bit,
with 20.12 being the default.
The RUD for high resolution (12.20) format is encoded with 12 MSBs representing the integer binary por-
tion with the remaining 20 LSBs representing the fractional binary portion. The maximum multiplication
factor is approximately 4096 with a resolution of 0.954 PPM in this configuration. See “Calculating the
User Defined Ratio” on page 30 for more information.
The RUD for high multiplication (20.12) format is encoded with 20 MSBs representing the integer binary
portion with the remaining 12 LSBs representing the fractional binary portion. In this configuration, the
maximum multiplication factor is approximately 1,048,575 with a resolution of 244 PPM. It is recommend-
ed that the 12.20 High-Resolution format be utilized whenever the desired ratio is less than 4096 since
the output frequency accuracy of the PLL is directly proportional to the accuracy of the timing reference
clock and the resolution of the RUD.
The status of internal dividers, such as the internal timing reference clock divider, are automatically taken
into account. Therefore RUD is simply the desired ratio of the output to input clock frequencies.
Referenced Control
Register Location
Ratio......................................“Ratio (Address 06h - 09h)” on page 28
LFRatioCfg ............................“Low-Frequency Ratio Configuration (LFRatioCfg)” on page 29
16
DS840PP1