WM8321 Datasheet, PDF (158/253 Pages) Wolfson Microelectronics plc – Processor Power Management Subsystem

WM8321
REGISTER
ADDRESS
BIT
LABEL
8 GP9_EINT
7 GP8_EINT
6 GP7_EINT
5 GP6_EINT
4 GP5_EINT
3 GP4_EINT
2 GP3_EINT
1 GP2_EINT
0 GP1_EINT
Register 4015h Interrupt Status 5
DEFAULT
DESCRIPTION
0
GPIO9 interrupt.
(Trigger is controlled by GP9_INT_MODE)
Note: Cleared when a ‘1’ is written.
0
GPIO8 interrupt.
(Trigger is controlled by GP8_INT_MODE)
Note: Cleared when a ‘1’ is written.
0
GPIO7 interrupt.
(Trigger is controlled by GP7_INT_MODE)
Note: Cleared when a ‘1’ is written.
0
GPIO6 interrupt.
(Trigger is controlled by GP6_INT_MODE)
Note: Cleared when a ‘1’ is written.
0
GPIO5 interrupt.
(Trigger is controlled by GP5_INT_MODE)
Note: Cleared when a ‘1’ is written.
0
GPIO4 interrupt.
(Trigger is controlled by GP4_INT_MODE)
Note: Cleared when a ‘1’ is written.
0
GPIO3 interrupt.
(Trigger is controlled by GP3_INT_MODE)
Note: Cleared when a ‘1’ is written.
0
GPIO2 interrupt.
(Trigger is controlled by GP2_INT_MODE)
Note: Cleared when a ‘1’ is written.
0
GPIO1 interrupt.
(Trigger is controlled by GP1_INT_MODE)
Note: Cleared when a ‘1’ is written.
Production Data
REFER TO
REGISTER
ADDRESS
R16407
(4017h) IRQ
Config
BIT
LABEL
1 IRQ_OD
0 IM_IRQ
Register 4017h IRQ Config
DEFAULT
DESCRIPTION
1
IRQ pin configuration
0 = CMOS
1 = Open Drain (integrated pull-up)
0
IRQ pin output mask
0 = Normal
1 = IRQ output is masked
REFER TO
REGISTER
ADDRESS
R16408
(4018h)
System
Interrupts
Mask
BIT
LABEL
DEFAULT
DESCRIPTION
15 IM_PS_INT
14 IM_TEMP_INT
1
Interrupt mask.
0 = Do not mask interrupt.
1 = Mask interrupt.
Default value is 1 (masked)
1
Interrupt mask.
0 = Do not mask interrupt.
1 = Mask interrupt.
Default value is 1 (masked)
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REFER TO
PD, February 2012, Rev 4.0
158