WM8321 Datasheet, PDF (125/253 Pages) Wolfson Microelectronics plc – Processor Power Management Subsystem

Production Data
ADDRESS
R16401
(4011h)
Interrupt Status
1
R16409
(4019h)
Interrupt Status
1 Mask
BIT
LABEL
15 PPM_SYSLO_EINT
15 IM_PPM_SYSLO_EINT
Table 71 Power Path Management Interrupts
WM8321
DESCRIPTION
Power Path SYSLO interrupt
(Rising Edge triggered)
Note: Cleared when a ‘1’ is written.
Interrupt mask.
0 = Do not mask interrupt.
1 = Mask interrupt.
Default value is 1 (masked)
23.2.8 REAL TIME CLOCK AND CRYSTAL OSCILLATOR INTERRUPTS
The primary RTC_INT interrupt comprises four secondary interrupts as described in Section 20.3. The
secondary interrupt bits are defined in Table 72.
Each of the secondary interrupts can be masked except for XTAL_TAMPER_EINT, which cannot be
masked. When a mask bit is set, the corresponding interrupt event is masked and does not trigger a
RTC_INT interrupt. The secondary interrupt bits in R16401 (4011h) and R16404 (4014h) are valid
regardless of whether the mask bit is set.
The secondary interrupts are all masked by default, except for XTAL_TAMPER_EINT, which cannot
be masked.
ADDRESS
R16401
(4011h)
Interrupt Status
1
BIT
LABEL
3
RTC_PER_EINT
2
RTC_ALM_EINT
R16404
(4014h)
7
XTAL_START_EINT
Interrupt Status
4
6
XTAL_TAMPER_EINT
R16409
(4019h)
3
IM_RTC_PER_EINT
Interrupt Status
1 Mask
2
IM_RTC_ALM_EINT
R16412
(401Ch)
7
IM_XTAL_START_EINT
Interrupt Status
4 Mask
DESCRIPTION
RTC Periodic interrupt
(Rising Edge triggered)
Note: Cleared when a ‘1’ is written.
RTC Alarm interrupt
(Rising Edge triggered)
Note: Cleared when a ‘1’ is written.
Crystal Oscillator Start Failure interrupt
(Rising Edge triggered)
Note: Cleared when a ‘1’ is written.
Crystal Oscillator Tamper interrupt
(Rising and Falling Edge triggered)
Note: Cleared when a ‘1’ is written.
Interrupt mask.
0 = Do not mask interrupt.
1 = Mask interrupt.
Default value is 1 (masked)
Interrupt mask.
0 = Do not mask interrupt.
1 = Mask interrupt.
Default value is 1 (masked)
Interrupt mask.
0 = Do not mask interrupt.
1 = Mask interrupt.
Default value is 1 (masked)
Table 72 Real Time Clock (RTC) and Crystal Oscillator (XTAL) Interrupts
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PD, February 2012, Rev 4.0
125