SA53 Datasheet, PDF (13/14 Pages) Cirrus Logic – Switching Amplifier

Product Innova tionFrom
Figure 10. Timing Diagrams
TOP INPUT
BOTTOM INPUT
SA53
DISABLE
OUTPUT
DELAY TIMING
td(fall)
td(rise)
td(dis)
td(dis)
td(dis)
td(dis)
3. POWER DISSIPATION
Figure 11. OUTPUT RESPONSE
The thermally enhanced package of the SA53 al-
lows several options for managing the power dissi-
80%
pated in the three output stages. Power dissipation
in traditional PWM applications is a combination
of output power dissipation and switching losses.
Output power dissipation depends on the quadrant
OUTPUT
of operation and whether external flyback diodes
20%
are used to carry the reverse or commutating cur-
rents. Switching losses are dependent on the fre-
quency of the PWM cycle as described in the typi-
cal performance graphs.
The size and orientation of the heatsink must be
selected to manage the average power dissipation
of the SA53. Applications vary widely and various
t(rise)
t(fall)
thermal techniques are available to match the re-
quired performance. The patent pending mounting
technique shown in Figure 12, with the SA53 in-
TOP INPUT
verted and suspended through a cutout in the PCB
is adequate for power dissipation up to 17W with ^{BOTTOM INPUT}
the HS33, a 1.5 inch long aluminum extrusion with
four fins. In free air, mounting the PCB perpendicu-
lar to the ground, such that the heated air flows upward along the channels of the fins can provide a total Θ_JA of less
than 14 ºC/W (9W max average PD). Mounting the PCB parallel to the ground impedes the flow of heated air and
provides a Θ_JA of 16.66 ºC/W (7.5W max average P_D). In applications in which higher power dissipation is expected
or lower junction or case temperatures are required, a larger heatsink or circulated air can significantly improve the
performance.
4. ORDERING AND PRODUCT STATUS INFORMATION
MODEL
TEMPERATURE PACKAGE
SA53-IHZ
-25 to 85ºC
64 pin Power QFP (HQ package drawing)
PRODUCTION STATUS
Samples Available 1Q09
SA53U
13