CS22220 Datasheet, PDF (13/34 Pages) Cirrus Logic – WIRELESS PCI/USB CONTROLLER

TXPAPE
TXPE
RXPEBB
BBSCLK
BBSDX
SYNTHLE
nRPD
RXCLK
MDRDY
RXD
Output
Radio power amplifier power enable is a software-controlled output. This
signal is used to gate power to the power amplifier.
Output
Radio transmit power enable indicates if transmit mode is enabled. When
low, this signal indicates transmitter is in standby mode.
Output
Baseband receive power enable is an output that indicates if the MAC is
in receive mode. Output to baseband processor enables receive mode in
baseband processor.
Output
Baseband serial clock is a programmable output generated by dividing
ARM_CLK by 14 (default). This clock is used for the serial control port to
sample the control and data signals.
Bi-directional
Baseband serial data is a bi-directional serial data bus, which is used to
transfer address and data to/from the internal registers of the baseband
processor.
Output
Synthesizer latch enable is an active high signal used to send data to the
synthesizer.
Output
Radio power down enable. This active low signal is used to power
management purpose for the radio circuitry.
Input
This is an input from the baseband processor. It is used to clock in
received data from baseband processor.
Input
Receive data ready is an input signal from the baseband processor,
indicating a data packet is ready to be transferred to the MAC. The signal
returns to an inactive state when there is no more receiver data or when
the link has been interrupted. This signal is sampled on the falling or
rising edge of RXCLK depending on baseband requirements.
Input
Receive data is an input from the baseband processor transferring
demodulated header information and data in a serial format. The data is
frame aligned with MD_RDY. This signal is sampled on the falling or
rising edge of RXCLK depending on baseband requirements.
CS22220 Wireless PCMCIA Controller
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DS557PP2 Rev. 3.0