CS2200-OT Datasheet, PDF (13/23 Pages) Cirrus Logic – Fractional-N Frequency Synthesizer

CS2200-OTP
5.4 PLL Clock Output
The PLL clock output pin (CLK_OUT) provides a buffered version of the output of the frequency synthesizer.
The driver can be set to high-impedance with the M2 pin when the M2Config[1:0] global parameter is set to
either 000 or 010. The output from the PLL automatically drives a static low condition while the PLL is un-
locked (when the clock may be unreliable). This feature can be disabled by setting the ClkOutUnl global
parameter, however the state CLK_OUT may then be unreliable during an unlock condition.
ClkOutUnl
PLL Locked/Unlocked
0
0
2:1 Mux
1
0
2:1 Mux
M2 pin with
M2Config[1:0] = 000, 010
PLL Clock Output
PLLClkOut
PLL Clock Output Pin
(CLK_OUT)
PLL Output
1
Figure 7. PLL Clock Output Options
Referenced Control
Parameter Definition
ClkOutUnl..............................“Enable PLL Clock Output on Unlock (ClkOutUnl)” on page 19
ClkOutDis ..............................“M2 Configured as Output Disable” on page 15
M2Config[2:0]........................“M2 Pin Configuration (M2Config[2:0])” on page 19
5.5 Auxiliary Output
The auxiliary output pin (AUX_OUT) can be mapped, as shown in Figure 8, to one of three signals: refer-
ence clock (RefClk), additional PLL clock output (CLK_OUT), or a PLL lock indicator (Lock). The mux is con-
trolled via the AuxOutSrc[1:0] modal parameter. If AUX_OUT is set to Lock, the AuxLockCfg global
parameter is then used to control the output driver type and polarity of the LOCK signal (see section 6.3.1
on page 18). In order to indicate an unlock condition, REF_CLK must be present. If AUX_OUT is set to
CLK_OUT, the phase of the PLL Clock Output signal on AUX_OUT may differ from the CLK_OUT pin. The
driver for the pin can be set to high-impedance using the M2 pin when the M2Config[1:0] global parameter
is set to either 001 or 010.
AuxOutSrc[1:0]
Timing Reference Clock
(RefClk)
PLL Clock Output
(PLLClkOut)
PLL Lock/Unlock Indication
(Lock)
3:1 Mux
AuxOutDis
AuxLockCfg
Auxiliary Output Pin
(AUX_OUT)
Figure 8. Auxiliary Output Selection
Referenced Control
Parameter Definition
AuxOutSrc[1:0]......................“Auxiliary Output Source Selection (AuxOutSrc[1:0])” on page 18
AuxOutDis .............................“M2 Configured as Output Disable” on page 15
AuxLockCfg...........................“AUX PLL Lock Output Configuration (AuxLockCfg)” section on page 18
M2Config[2:0]........................“M2 Pin Configuration (M2Config[2:0])” on page 19
DS842F3
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