CS2200-OTP Datasheet, PDF (1/22 Pages) Cirrus Logic – Fractional-N Frequency Synthesizer

CS2200-OTP
Fractional-N Frequency Synthesizer
Features
 Delta-Sigma Fractional-N Frequency Synthesis
– Generates a Low Jitter 6 - 75 MHz Clock
Relative to 8 - 75 MHz Reference Clock
 Highly Accurate PLL Multiplication Factor
– Maximum Error Less Than 1 PPM
 One-Time Programmability
– Configurable Hardware Control Pins
– Configurable Auxiliary Output
 Flexible Sourcing of Reference Clock
– External Oscillator or Clock Source
– Supports Inexpensive Local Crystal
 Minimal Board Space Required
– No External Analog Loop-filter
Components
General Description
The CS2200-OTP is an extremely versatile system
clocking device that utilizes a programmable phase lock
loop. The CS2200-OTP is based on an analog PLL ar-
chitecture comprised of a Delta-Sigma Fractional-N
Frequency Synthesizer. This architecture allows for fre-
quency synthesis and clock generation from a stable
reference clock. The CS2200-OTP has many configura-
tion options which are set once prior to runtime. At
runtime there are three hardware configuration pins
available for mode and feature selection.
The CS2200-OTP is available in a 10-pin MSOP pack-
age in Commercial (-10°C to +70°C) grade. Customer
development kits are also available for custom device
prototyping, small production programming, and device
evaluation. Please see “Ordering Information” on
page 22 for complete details.
3.3 V
Hardware Control
Hardware Configuration
Timing Reference
PLL Output
PLL Lock Indicator
Auxiliary
Output
8 MHz to 75 MHz
Low-Jitter Timing
Reference
Phase
Comparator
Internal
Loop Filter
Voltage Controlled
Oscillator
Fractional-N
Divider
Delta-Sigma ^N
Modulator
6 to 75 MHz
PLL Output
Output to Input
Clock Ratio
Preliminary Product Information
http://www.cirrus.com
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
Copyright © Cirrus Logic, Inc. 2008
(All Rights Reserved)
JUN '08
DS842PP1