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| THC63LVD1022 Datasheet, PDF (8/17 Pages) California Eastern Labs – 30Bit Color/150Mpps Dual-Link LVDS to LVCMOS converter | |||
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LVCMOS/TTL & LVDS Receiver AC Specifications
Over recommended operating supply and temperature range unless otherwise specified
Symbol
Parameter
Min
Typ
Max
Unit
tRCP CLK Period
RCLK1/2
CLKOUT
13.3
-
6.6
-
50
ns
25
tRCH CLKOUT High Time
2/7 TRCP
4/7 TRCP
5/7 TRCP
ns
tRCL CLKOUT Low Time
5/7 TRCP
3/7 TRCP
2/7 TRCP
ns
tDOUT LVCMOS Data OUT Period
6.6
-
25
ns
tRS LVCMOS Data Setup to CLKOUT
2.0
-
4.6
ns
tRH LVCMOS Data Hold to CLKOUT
2.0
-
4.6
ns
tSK Receiver Skew Margin
-400
-
400
ps
tRIP1 Input Data Position0
- tSK
0
+ tSK
ns
tRIP0 Input Data Position1
tRCIP /7- tSK
tRCIP /7
tRCIP /7+ tSK
ns
tRIP6 Input Data Position2
2tRCIP /7- tSK
2tRCIP /7
2tRCIP /7+ tSK
ns
tRIP5 Input Data Position3
3tRCIP /7- tSK
3tRCIP /7
3tRCIP /7+ tSK
ns
tRIP4 Input Data Position4
4tRCIP /7- tSK
4tRCIP /7
4tRCIP /7+ tSK
ns
tRIP3 Input Data Position5
5tRCIP /7- tSK
5tRCIP /7
5tRCIP /7+ tSK
ns
tRIP2 Input Data Position6
6tRCIP /7- tSK
6tRCIP /7
6tRCIP /7+ tSK
ns
tRPLL Phase Lock Loop Set
-
-
1
ms
* Typ values are at the conditions of VCC=3.3V and Ta = +25ºC
Table 8. LVCMOS/TTL & LVDS Receiver AC Specifications
THC63LVD1022_Rev.1.02_E
8
Copyright©2013 THine Electronics, Inc.
THine Electronics, Inc.
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