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THC63LVD1022 Datasheet, PDF (7/17 Pages) California Eastern Labs – 30Bit Color/150Mpps Dual-Link LVDS to LVCMOS converter
Worst Case Pattern
CLKOUT
Rn, Gn, Bn
(n = 0~9)
HSYNC, VSYNC
DE
Figure 5. Worst Case Pattern
Electrical Characteristics
LVCMOS/TTL DC Specifications
Over recommended operating supply and temperature range unless otherwise specified
Symbol
Parameter
Conditions
Min Typ* Max Unit
VIH High Level Input Voltage
RS=VCC or GND
2.0
-
VCC
V
VIL Low Level Input Voltage
RS=VCC or GND
GND
-
0.8
V
VOH High Level Output Voltage IOH=12mA(Data), 16mA(Clk) 2.4
-
-
V
VOL Low Level Output Voltage IOH=12mA(Data), 16mA(Clk)
-
-
0.4
V
IIL Input Leakage Current
-
-
±1
μA
PD Power Dissipation
* Typ values are at the conditions of VCC=3.3V and Ta = +25ºC
-
0.46
-
W
Table 6. LVCMOS/TTL DC Specifications
LVDS Receiver DC Specifications
Over recommended operating supply and temperature range unless otherwise specified
Symbol
Parameter
Conditions
Min
Typ*
Max
Unit
VIC Differential Input Common Voltage
0.6
1.2
1.8
V
|VID| Differential Voltage
100
-
600
mV
VTH Differential Input High Threshold
VIC = 1.2V
-
VTL Differential Input Low Threshold
VIC = 1.2V
-100
IINLVDS LVDS Input Current
-
*Typ values are at the conditions of VCC=3.3V and Ta = +25ºC
-
100
mV
-
-
mV
-
±20
μA
Table 7. LVDS Receiver DC Specifications
THC63LVD1022_Rev.1.02_E
7
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THine Electronics, Inc.