THC63LVD1022 Datasheet, PDF (11/17 Pages) California Eastern Labs – 30Bit Color/150Mpps Dual-Link LVDS to LVCMOS converter

LVDS Data Timing Diagram
Figure 10. LVDS Data Timing Diagram
LVDS Input Data Mapping (MLSB=High, MAP[2:0]=High)
LVDS
Input Data
(1^st Pixel Data)
1^st pix data
LVDS
Input Data
(2^nd Pixel Data)
2^nd pix data
RA10
R4 (n)
RA20
R4 (n+1)
RA11
R5 (n)
RA21
R5 (n+1)
RA12
R6 (n)
RA22
R6 (n+1)
RA13
R7 (n)
RA23
R7 (n+1)
RA14
R8 (n)
RA24
R8 (n+1)
RA15
R9 (n)
RA25
R9 (n+1)
RA16
G4 (n)
RA26
G4 (n+1)
RB10
G5 (n)
RB20
G5 (n+1)
RB11
G6 (n)
RB21
G6 (n+1)
RB12
G7 (n)
RB22
G7 (n+1)
RB13
G8 (n)
RB23
G8 (n+1)
RB14
G9 (n)
RB24
G9 (n+1)
RB15
B4 (n)
RB25
B4 (n+1)
RB16
B5 (n)
RB26
B5 (n+1)
RC10
B6 (n)
RC20
B6 (n+1)
RC11
B7 (n)
RC21
B7 (n+1)
RC12
B8 (n)
RC22
B8 (n+1)
RC13
B9 (n)
RC23
B9 (n+1)
RC14
HSYNC
RC24
-
RC15
VSYNC
RC25
-
RC16
DE
RC26
-
RD10
R2 (n)
RD20
R2 (n+1)
RD11
R3 (n)
RD21
R3 (n+1)
RD12
G2 (n)
RD22
G2 (n+1)
RD13
G3 (n)
RD23
G3 (n+1)
RD14
B2 (n)
RD24
B2 (n+1)
RD15
B3 (n)
RD25
B3 (n+1)
RD16
-
RD26
-
RE10
R0 (n)
RE20
R0 (n+1)
RE11
R1 (n)
RE21
R1 (n+1)
RE12
G0 (n)
RE22
G0 (n+1)
RE13
G1 (n)
RE23
G1 (n+1)
RE14
B0 (n)
RE24
B0 (n+1)
RE15
B1 (n)
RE25
B1 (n+1)
RE16
-
RE26
-
Table 9. LVDS Input Data Mapping
THC63LVD1022_Rev.1.02_E
11
Copyright©2013 THine Electronics, Inc.
THine Electronics, Inc.