CAT9555_08 Datasheet, PDF (8/17 Pages) Catalyst Semiconductor – 16-bit I2C and SMBus I/O Port with Interrupt

CAT9555
INT: Interrupt Output
The open-drain interrupt output is activated when one of
the port pins configured as an input changes state
(differs from the corresponding input port register bit
state). The interrupt is deactivated when the input returns
to its previous state or the input port register is read.
Since there are two 8-bit ports that are read independently,
the interrupt caused by Port 0 will not be cleared by a
read of Port 1, or vice versa.
Changing an I/O from an output to an input may cause
a false interrupt if the state of the pin does not match the
contents of the input port register.
Data from
Shift Register
Data from
Shift Register
Write
Configuration Pulse
Configuration
Register
D
Q
FF
CK
Q
Write Pulse
D
Q
FF
CK
Q
Output Port
Register
Read Pulse
Q1
Q2
Input Port
Register
D
Q
LATCH
CK
Q
Data from
Shift Register
Write
Polarity
Register
D
Q
FF
CK
Q
Polarity
Inversion Register
Figure 4. Simplified Schematic of I/Os
Output Port
Register Data
VCC
I/O Pin
VSS
Input Port
Register Data
To INT
Polarity
Register Data
Doc. No. MD-9003 , Rev. G
8
© Catalyst Semiconductor, Inc.
Characteristics subject to change without notice