CAT28C17A_04 Datasheet, PDF (8/10 Pages) Catalyst Semiconductor – 16K-Bit CMOS PARALLEL EEPROM

CAT28C17A
HARDWARE DATA PROTECTION
The following is a list of hardware data protection fea-
tures that are incorporated into the CAT28C17A.
(1) V_CC sense provides for write protection when V_CC
falls below 3.0V min.
(2) A power on delay mechanism, tINIT (see AC charac-
teristics), provides a 5 to 20 ms delay before a write
sequence, after V_CC has reached 3.0V min.
(3) Write inhibit is activated by holding any one of OE
low, CE high or WE high.
(4) Noise pulses of less than 20 ns on the WE or CE
inputs will not result in a write cycle.
Doc. No. 1075, Rev. B
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