CAT24FC256_05 Datasheet, PDF (8/12 Pages) Catalyst Semiconductor – 256K-Bit I2C Serial CMOS EEPROM

CAT24FC256
Figure 9. Selective Read Timing
S
T
BUS ACTIVITY: ^A
MASTER ^R
T
SDA LINE S
SLAVE
ADDRESS
BYTE ADDRESS
A15–A8
A7–A0
*
A
A
C
C
K
K
S
T
A _SLAVE
R _ADDRESS
T
S
A
A
C
C
K
K
*^{=Don't Care Bit}
Figure 10. Sequential Read Timing
BUS ACTIVITY: SLAVE
MASTER ADDRESS
SDA LINE
d A
C
Discontinue ^K
DATA n
DATA n+1
DATA n+2
A
A
A
C
C
C
K
K
K
S
T
DATA
O
P
P
N
O
A
C
K
art_S
P^T
DATA n+x
O
P
P
N
O
A
C
K
Doc. No. 1040, Rev. K
© 2005 by Catalyst Semiconductor, Inc.
8
Characteristics subject to change without notice