CAT9554A Datasheet, PDF (3/16 Pages) Catalyst Semiconductor – 8-bit I2C and SMBus I/O Port with Interrupt

CAT9554, CAT9554A
D.C. OPERATING CHARACTERISTICS
V_CC = 2.3 to 5.5 V; T_A = -40°C to +85°C, unless otherwise specified
Symbol Parameter
Conditions
Min Typ Max
Supplies
V_CC Supply voltage
I_CC Supply current
I_stbl Standby current
I_stbh Standby current
V_POR Power-on reset voltage
SCL, SDA, INT
V_IL ⁽¹⁾
V_IH ⁽¹⁾
I_OL
I_L
C_I ⁽²⁾
C_O ⁽²⁾
Low level input voltage
High level input voltage
Low level output current
Leakage current
Input capacitance
Output capacitance
A₀, A₁, A₂
V_IL ⁽¹⁾ Low level input voltage
V_IH ⁽¹⁾ High level input voltage
I_LI Input leakage current
I/Os
2.3
—
5.5
Operating mode; V_CC = 5.5 V; no load;
f_SCL = 100 kHz
—
104 175
Standby mode; V_CC = 5.5 V; no load;
V_I = V_SS; f_SCL = 0 kHz; I/O = inputs
—
550 700
Standby mode; V_CC = 5.5 V; no load;
V_I = V_CC; f_SCL = 0 kHz; I/O = inputs
—
0.25
1
No load; V_I = V_CC or V_SS
—
1.5 1.65
V_OL = 0.4V
V_I = V_CC or V_SS
V_I = V_SS
V_O = V_SS
-0.5
— 0.3 V_CC
0.7 V_CC —
5.5
3
—
—
–1
—
+1
—
—
6
—
—
8
-0.5
—
0.8
2.0
—
5.5
-1
—
1
V_IL Low level input voltage
V_IH High level input voltage
I_OL Low level output current
V_OH High level output voltage
I_IH
I_IL
C_I ⁽²⁾
C_O ⁽²⁾
Input leakage current
Input leakage current
Input capacitance
Output capacitance
V_OL = 0.5 V; V_CC = 2.3 V; ⁽³⁾
V_OL = 0.7 V; V_CC = 2.3 V; ⁽³⁾
V_OL = 0.5 V; V_CC = 4.5 V; ⁽³⁾
V_OL = 0.7 V; V_CC = 4.5 V; ⁽³⁾
V_OL = 0.5 V; V_CC = 3.0 V; (⁽³⁾
V_OL = 0.7 V; V_CC = 3.0 V; ⁽³⁾
I_OH = – 8 mA; V_CC = 2.3 V; ⁽⁴⁾
I_OH = – 10 mA; V_CC = 2.3 V; ⁽⁴⁾
I_OH = – 8 mA; V_CC = 3.0 V; ⁽⁴⁾
I_OH = – 10 mA; V_CC = 3.0 V; ⁽⁴⁾
I_OH = – 8 mA; V_CC = 4.75 V; ⁽⁴⁾
I_OH = – 10 mA; V_CC = 4.75 V; ⁽⁴⁾
V_CC = 3.6 V; V_I = V_CC
V_CC = 5.5 V; V_I = V_SS
-0.5
—
0.8
2.0
—
5.5
8
10
—
10
13
—
8
17
—
10
24
—
8
14
—
10
19
—
1.8
—
—
1.7
—
—
2.6
—
—
2.5
—
—
4.1
—
—
4.0
—
—
—
—
1
—
—
-100
—
—
5
—
—
8
Notes:
1. V_IL min and V_IH max are reference values only and are not tested.
2. This parameter is characterized initially and after a design or process change that affects the parameter. Not 100% tested.
3. The total current sunk by all I/Os must be limited to 100 mA and each I/O limited to 25 mA maximum.
4. The total current sourced by all I/Os must be limited to 85 mA.
Unit
V
µA
µA
µA
V
V
V
mA
µA
pF
pF
V
V
µA
V
V
mA
mA
mA
mA
mA
mA
V
V
V
V
V
V
µA
µA
pF
pF
© 2006 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
3
Doc. No. 25088, Rev. B