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CAT9554A Datasheet, PDF (10/16 Pages) Catalyst Semiconductor – 8-bit I2C and SMBus I/O Port with Interrupt
CAT9554, CAT9554A
The output port register sets the outgoing logic levels of
the I/O ports, defined as outputs by the configuration
register. Bit values in this register have no effect on I/O
pins defined as inputs. Reads from the output port
register reflect the value that is in the flip-flop controlling
the output, not the actual I/O pin value.
The polarity inversion register allows the user to invert
the polarity of the input port register data. If a bit in this
register is set (“1”) the corresponding input port data is
inverted. If a bit in the polarity inversion register is
cleared (“0”), the original input port polarity is retained.
The configuration register sets the directions of the
ports. Set the bit in the configuration register to enable
the corresponding port pin as an input with a high
impedance output driver. If a bit in this register is cleared,
the corresponding port pin is enabled as an output. At
power-up, the I/Os are configured as inputs with a weak
pull-up resistor to VCC.
Data is transmitted to the CAT9554/9554A registers
using the write mode shown in Figure 9 and Figure 10.
The CAT9554/9554A registers are read according to
the timing diagrams shown in Figure 11 and Figure 12.
Once a command byte has been sent, the register which
was addressed will continue to be accessed by reads
until a new command byte will be sent.
SCL
12 34 56 78 9
slave address
R/W
command byte
SDA S 0 1 0 0 A2 A1 A0 0 A
start condition
WRITE TO
PORT
acknowledge
from slave
0 0 0 0 0 0 01 A
acknowledge from slave
DATA OUT
FROM PORT
Figure 9. Write to Output Port Register
data to port
DATA 1
AP
acknowledge from slave
stop
condition
DATA 1 VALID
tpv
SCL
12 34 56 78 9
slave address
R/W
command byte
SDA S 0 1 0 0 A2 A1 A0 0 A 0 0 0 0 0 0 1 1/0 A
start condition
WRITE TO
REGISTER
acknowledge
from slave
acknowledge from slave
data to register
DATA 1
AP
acknowledge from slave
stop
condition
Figure 10. Write to Configuration or Polarity Inversion Register
Doc. No. 25088, Rev. B
10
© 2006 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice