CAT33C704 Datasheet, PDF (12/14 Pages) Catalyst Semiconductor – 4K-Bit Secure Access Serial E2PROM

CAT33C704
Preliminary
INSTRUCTION SET
DISAC Disable Access
1000 1000
This instruction will lock the memory from all program/
erase operations regardless of the contents of the memory
pointer. A write can be accomplished only by first enter-
ing the ENAC instruction followed by a valid access
code.
ENAC Enable Access
1100 0101 [Access Code]
In the protected mode, this instruction, followed by a
valid access code, unlocks the device for read/write/
clear access.
WMPR Write Memory Pointer Register
1100 0100 [A15–A8] [A7–A0] (x8 organization)
1100 0100 [A7–A0] (x16 organization)
The WMPR instruction followed by 8 or 16 bits of
address (depending on the organization) will move the
pointer to the newly specified address.
MACC Modify Access Code
1101 [Length] [Old code] [New code]
[New code]
This instruction requires the user to enter the old access
code, if one was set previously, followed by the new
access code and a re-entry of the new access code for
verification. Within the instruction format, the variable
[Length] designates the length of the access code as the
following:
[Length] = [0] No access code. Set device to unpro-
tected mode.
[Length] = [1–8] Length of access code is 1 to 8 bytes.
[Length] = [>8] Illegal number of bytes. The CAT33C704
will ignore the rest of the transmission.
RMPR Read Memory Pointer Register
1100 1010
Output the content of the memory pointer register to the
serial output port.
OVMPR Override Memory Pointer Register
1000 0011
Override the memory protection for the next instruction.
READ Read Memory
1100 1001 [A15–A8] [A7–A0] (x8 organization)
1100 1001 [A7–A0] (x16 organization)
Output the contents of the addressed memory location
to the serial port.
WRITE Write Memory
1100 0001 [A15–A8] [A7–A0] [D7–D0] (x8 organization)
1100 0001 [A7–A0] [D15–D8] [D7–D0] (x16 organization)
Write the 8 bit or 16 bit data to the addressed memory
location. After the instruction, address, and data have
been entered, the self-timed program/erase cycle will
start. The addressed memory location will be erased
before data is written. The DO pin may be used to output
the RDY/BUSY status by having previously entered the
ENBSY instruction. During the program/erase cycle, DO
will output a LOW for BUSY during this cycle and a HIGH
for READY after the cycle has been completed.
ERASE Clear Memory
1100 0000 [A15–A8] [A7–A0] (x8 organization)
1100 0000 [A7–A0] (x16 organization)
Erase data in the specified memory location (set memory
to “1”). After the instruction and the address have been
entered, the self-timed clear cycle will start. The DO pin
may be used to output the RDY/BUSY status by having
previously entered the ENSBY instruction. During the
clear cycle, DO will output a LOW for BUSY during this
cycle and a HIGH for ready after the cycle has been
completed.
ERAL Clear All
1000 1001
1000 1001
Erase the data of all memory locations (all cells set to
“1”). For protection against inadvertent chip clear, the
ERAL instruction is required to be entered twice.
WRAL Write All
1000 1001
1100 0011 [D15–D8] [D7–D0] (x16 organization)
1000 1001
1100 0011 [D7–D0] (x8 organization)
Write one or two bytes of data to all memory locations.
An ERAL will be automatically performed before the
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