CAT24FC64 Datasheet, PDF (1/10 Pages) Catalyst Semiconductor – 64K-Bit I2C Serial CMOS EEPROM

CAT24FC64
ALOGEN ^FR
64K-Bit I²C Serial CMOS EEPROM
FEATURES
I Fast mode I²C bus compatible*
I Industrial and extended
temperature ranges
LEA
D
F
R
E
E
TM
I Max clock frequency:
- 400KHz for VCC=1.8V to 5.5V
- 1MHz for VCC=2.5V to 5.5V
I Schmitt trigger filtered inputs for noise suppression
I Low power CMOS technology
I 64-byte page write buffer
I Self-timed write cycle with auto-clear
I 5 ms max write cycle time
I Write protect feature
– entire array protected when WP at V_IH
I 1,000,000 program/erase cycles
I 100 year data retention
I 8-pin DIP, 8-pin SOIC (JEDEC), 8-pin SOIC
(EIAJ), 8-pin TSSOP and TDFN packages
DESCRIPTION
The CAT24FC64 is a 64K-bit Serial CMOS EEPROM
internally organized as 8,192 words of 8 bits each.
Catalyst’s advanced CMOS technology substantially
reduces device power requirements. The CAT24FC64
features a 64-byte page write buffer. The device oper-
ates via the I²C bus serial interface and is available in 8-
pin DIP or 8-pin SOIC packages.
PIN CONFIGURATION
DIP Package (P, L)
TDFN Package (RD2, ZD2)
A0 ¹
A1 2
A2 3
VSS 4
8 VCC
7 WP
6 SCL
5 SDA
A0 1
A1 2
A2 3
VSS 4
8 VCC
7 WP
6 SCL
5 _SDA
(Top View)
BLOCK DIAGRAM
EXTERNAL LOAD
VCC
VSS
DOUT
ACK
WORD ADDRESS
BUFFERS
SOIC Package (J, W, K, X) _{TSSOP Package (U, Y)}
SDA
A0 ¹
A1 ²
A2
3
VSS 4
8 VCC _A0 1
7 WP _A1 2
6 SCL _A2
3
5 SDA VSS 4
8 VCC
7 WP
6 SCL
5 SDA _WP
START/STOP
LOGIC
CONTROL
LOGIC
XDEC
SENSE AMPS
SHIFT REGISTERS
COLUMN
DECODERS
512
EEPROM
128
128X512
PIN FUNCTIONS
Pin Name
Function
A0, A1, A2 Address Inputs
SDA
Serial Data/Address
SCL
Serial Clock
WP
Write Protect
V_CC
+1.8V to +5.5V Power Supply
V_SS
Ground
NC
No Connect
SCL
A0
A1
A2
STATE COUNTERS
SLAVE
ADDRESS
COMPARATORS
* Catalyst Semiconductor is licensed by Philips Corporation to carry the I²C Bus Protocol.
DATA IN STORAGE
HIGH VOLTAGE/
TIMING CONTROL
© 2004 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
1
Doc. No. 1046, Rev. G