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CM2009 Datasheet, PDF (2/6 Pages) California Micro Devices Corp – VGA Port Companion Circuit
CM2009
Product Description (cont’d)
Two non-inverting drivers provide buffering for the
HSYNC and VSYNC signals from the video controller
IC (SYNC1, SYNC2). These buffers accept TTL input
levels and convert them to CMOS output levels that
swing between Ground and VCC_SYNC, which is typi-
cally 5V. Additionally, each driver has a series termina-
tion resistor (RT) connected to the SYNC_OUT pin,
eliminating the external termination resistors typically
required for the HSYNC and VSYNC lines of the video
cable. There are three versions with different values of
RT to allow termination at typically 65Ω (CM2009-00)
or 55Ω (CM2009-01) or 15Ω (CM2009-02).
The 15Ω (CM2009-02) version will typically require two
external resistors which can be chosen to exactly
match the characteristic impedance of the SYNC lines
of the video cable.
Two N-channel MOSFETs provide the level shifting
function required when the DDC controller is operated
at a lower supply voltage than the monitor. The gate
terminals for these MOSFETS (VCC_DDC) should be
connected to the supply rail (typically 3.3V) that sup-
plies power to the transceivers of the DDC controller.
PACKAGE / PINOUT DIAGRAM
Top View
VCC_SYNC
1
VCC_VIDEO
2
VIDEO_1
3
VIDEO_2
4
VIDEO_3
5
GND
6
VCC_DDC
7
BYP
8
16
SYNC_OUT2
15
SYNC_IN2
14
SYNC_OUT1
13
SYNC_IN1
12
DDC_OUT2
11
DDC_IN2
10
DDC_IN1
9
DDC_OUT1
Note: This drawing is not to scale.
16 Pin QSOP
Ordering Information
PART NUMBERING INFORMATION
ROUT
65Ω
55Ω
15Ω
Pins
16
16
16
Package
QSOP
QSOP
QSOP
Standard Finish
Ordering Part
Number1
Part Marking
CM2009-00QS
CM2009-00QS
CM2009-01QS
CM2009-01QS
CM2009-02QS
CM2009-02QS
Lead-free Finish
Ordering Part
Number1
Part Marking
CM2009-00QR
CM2009-00QR
CM2009-01QR
CM2009-01QR
CM2009-02QR
CM2009-02QR
Note 1: Parts are shipped in Tape & Reel form unless otherwise specified.
© 2004 California Micro Devices Corp. All rights reserved.
2
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▲ Tel: 408.263.3214 ▲ Fax: 408.263.7846 ▲ www.calmicro.com 08/12/04