CS42438 Datasheet, PDF (52/64 Pages) Cirrus Logic – 108 dB, 192 kHz 6-in, 8-out TDM CODEC

8.1.1 Passive Input Filter
The passive filter implementation shown in Figure 22 will attenuate any noise energy at
6.144 MHz but will not provide optimum source impedance for the ADC modulators. Full analog
performance will therefore not be realized using a passive filter. Figure 22 illustrates the unity
gain, passive input filter solution. In this topology the distortion performance is affected, but the
dynamic range performance is not limited.
100 kΩ
150 Ω
10 µF
2700 pF
C0G
ADC1-2
AIN1+,2+,3+,4+
4.7 µF
AIN1-,2-,3-,4-
100 kΩ
150 Ω
10 µF
2700 pF
C0G
ADC3
AIN5A,6A
100 kΩ
150 Ω
10 µF
2700 pF
C0G
AIN5B,6B
Figure 22. Passive Input Filter
8.1.2 Passive Input Filter w/Attenuation
Some applications may require signal attenuation prior to the ADC. The full-scale input voltage
will scale with the analog power supply voltage. For VA = 5.0 V, the full-scale input voltage is
approximately 2.8 Vpp, or 1 Vrms (most consumer audio line-level outputs range from 1.5 to
2 Vrms).
Figure 23 shows a passive input filter with 6 dB of signal attenuation. Due to the relatively high
input impedance on the analog inputs, the full distortion performance cannot be realized. Also,
the resistor divider circuit will determine the input impedance into the input filter. In the circuit
shown in Figure 23, the input impedance is approximately 5 kΩ. By doubling the resistor values,
the input impedance will increase to 10 kΩ. However, in this case the distortion performance will
drop due to the increase in series resistance on the analog inputs.
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