CS42438 Datasheet, PDF (44/64 Pages) Cirrus Logic – 108 dB, 192 kHz 6-in, 8-out TDM CODEC

7.4 FUNCTIONAL MODE (ADDRESS 03H)
7
Reserved
6
Reserved
5
Reserved
4
Reserved
3
MFreq2
2
MFreq1
1
MFreq0
0
Reserved
7.4.1 MCLK FREQUENCY (MFREQ[2:0])
Default = 000
Function:
Sets the appropriate frequency for the supplied MCLK. For TDM operation, SCLK must equal 256Fs.
MCLK can be equal to or greater than SCLK.
MFreq2
0
0
0
0
1
MFreq1
0
0
1
1
X
Ratio (xFs)
MFreq0
Description
0 1.0290 MHz to 12.8000 MHz
1 1.5360 MHz to 19.2000 MHz
0 2.0480 MHz to 25.6000 MHz
1 3.0720 MHz to 38.4000 MHz
X 4.0960 MHz to 51.2000 MHz
SSM
256
384
512
768
1024
DSM
N/A
N/A
256
384
512
QSM
N/A
N/A
N/A
N/A
256
Table 7. MCLK Frequency Settings
7.5 MISCELLANEOUS CONTROL (ADDRESS 04H)
7
FREEZE
6
AUX_DIF
5
Reserved
4
Reserved
3
Reserved
2
Reserved
1
Reserved
0
Reserved
7.5.1 FREEZE CONTROLS (FREEZE)
Default = 0
Function:
This function will freeze the previous settings of, and allow modifications to be made to the channel
mutes, the DAC and ADC Volume Control/Channel Invert registers without the changes taking effect
until the FREEZE is disabled. To have multiple changes in these control port registers take effect si-
multaneously, enable the FREEZE bit, make all register changes, then disable the FREEZE bit.
7.5.2 AUXILIARY DIGITAL INTERFACE FORMAT (AUX_DIF)
Default = 0
0 - Left Justified
1 - I²S
Function:
This bit selects the digital interface format used for the AUX Serial Port. The required relationship be-
tween the Left/Right clock, serial clock and serial data is defined by the Digital Interface Format and
the options are detailed in Figures 15-16.
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