CL-PS7110 Datasheet, PDF (44/82 Pages) Cirrus Logic – Low-Power System-on-a-Chip

TC1M
TC1S
TC2M
TC2S
UARTEN
BZTOG
BZMOD
DBGEN
LCDEN
CDENTX
CDENRX
SIREN
EXCKEN
CL-PS7110
Low-Power System-on-a-Chip
Timer Counter 1 (TC1) mode. Setting this bit sets TC1 to Prescale mode, clearing it
sets Free-running mode.
Timer Counter 1 clock source. Setting this bit sets the TC1 clock source to 512 kHz,
clearing it sets the clock source to 2 kHz.
Timer Counter 2 (TC2) mode. Setting this bit sets TC2 to Prescale mode, clearing it
sets Free-running mode.
Timer Counter 2 clock source. Setting this bit sets the TC2 clock source to 512 kHz,
clearing it sets the clock source to 2 kHz.
Internal UART enable bit. Setting this bit enables the internal UART.
Bit to drive buzzer directly.
This bit sets the Buzzer Drive mode. 0 = the buzzer drive is connected directly to the
BZTOG bit. 1 = the buzzer drive is connected to the TC1 under-flow bit.
Setting this bit enables Debug mode. In this mode all internal accesses are output as
if they were reads or writes to expansion memory addressed by CS6. CS6 remains
active in its standard address range. In addition, the internal interrupt request and fast
interrupt request signals to the ARM710A microprocessor are output on port E bits 1
and 2 in Debug mode:
CS6 = CS6/internal I/O strobe
PE1 = NIRQ
PE2 = NFIQ
LCD enable bit. Setting this bit enables the LCD controller.
Codec interface enable Tx bit. Setting this bit enables the codec interface for data
transmission to an external codec device.
Codec interface enable Rx bit. Setting this bit enables the codec interface for data
reception from an external codec device.
HP SIR protocol encoding enable bit. This bit has no effect if the UART is not enabled.
External expansion clock enable. If this bit is set, the EXPCLK is enabled continu-
ously; it is the same speed and phase as the CPU clock, and free-run all the time the
main oscillator is running. This bit should not be left set for power consumption rea-
sons. If the system enters the standby state, the EXPCLK is undefined. If this bit is
clear, EXPCLK is active during memory cycles to the expansion slots that have exter-
nal wait-state generation enabled.
44
PROGRAMMING INTERFACE
May 1997
DATA BOOK v1.5