CS42528 Datasheet, PDF (42/91 Pages) Cirrus Logic – 114 dB, 192 kHz 8-Ch Codec with S/PDIF Receiver

CS42528
5. REGISTER QUICK REFERENCE
Addr Function
7
6
01h ID
Chip_ID3
Chip_ID2
page 47
1
1
default
02h Power Con- PDN_RCVR1 PDN_RCVR0
trol
page 48
1
0
default
03h Functional CODEC_FM1 CODEC_FM0
Mode
page 47
0
0
default
04h Interface
Formats
DIF1
DIF0
page 50
0
1
default
05h Misc Control Ext ADC
SCLK
HiZ_RMCK
page 52
0
0
default
06h Clock Con- RMCK_DIV1 RMCK_DIV0
trol
page 53
0
0
default
07h OMCK/PLL_ RATIO7
CLK Ratio
RATIO6
page 55
X
X
default
08h RVCR Sta- Digital Silence
AES
tus
Format2
page 55
X
X
default
09h Burst Pre-
amble PC
Byte 0
PC0-7
PC0-6
page 56
X
X
default
0Ah Burst Pre-
amble PC
Byte 1
PC1-7
PC1-6
page 56
X
X
default
0Bh Burst Pre-
amble PD
Byte 0
PD0-7
PD0-6
page 56
X
X
default
0Ch Burst Pre-
amble PD
Byte 1
PD1-7
PD1-6
page 56
X
X
default
0Dh Volume
Control
Reserved
SNGVOL
page 57
0
0
default
5
Chip_ID1
1
PDN_ADC
0
SAI_FM1
0
ADC_OL1
0
Reserved
0
OMCK
Freq1
0
RATIO5
X
AES
Format1
X
PC0-5
X
PC1-5
X
PD0-5
X
PD1-5
X
SZC1
0
4
Chip_ID0
1
3
Rev_ID3
X
2
Rev_ID2
X
1
Rev_ID1
X
0
Rev_ID0
X
PDN_DAC4 PDN_DAC3 PDN_DAC2 PDN_DAC1
PDN
0
0
0
0
1
SAI_FM0
0
ADC_SP
SEL1
0
ADC_SP
SEL0
0
DAC_DEM RCVR_DEM
0
0
ADC_OL0 DAC_OL1 DAC_OL0 SAI_RJ16 CODEC_RJ16
0
0
0
0
0
FREEZE
0
FILTSEL
0
HPF_
FREEZE
0
CODEC_SP
M/S
0
SAI_SP
M/S
0
OMCK
Freq0
0
PLL_LRCK SW_CTRL1 SW_CTRL0 FRC_PLL_LK
0
0
0
0
RATIO4
RATIO3
RATIO2
RATIO1
RATIO0
X
X
X
X
X
AES
Format0
X
Active_CLK RVCR_CLK2 RVCR_CLK1 RVCR_CLK0
X
X
X
X
PC0-4
PC0-3
PC0-2
PC0-1
PC0-0
X
PC1-4
X
PC1-3
X
PC1-2
X
PC1-1
X
PC1-0
X
PD0-4
X
PD0-3
X
PD0-2
X
PD0-1
X
PD0-0
X
PD1-4
X
PD1-3
X
PD1-2
X
PD1-1
X
PD1-0
X
SZC0
0
X
AMUTE
1
X
MUTE
SAI_SP
0
X
RAMP_UP
0
X
RAMP_DN
0
42
DS586PP5