English
Language : 

EP9315 Datasheet, PDF (31/64 Pages) Cirrus Logic – Enhanced Universal Platform System-on-Chip Processor
PCMCIA Write Cycle
Parameter
AD setup to signal transition time
Attribute access time
Attribute hold time
Attribute space pre-charge delay time
Common access time
Common hold time
Common space pre-charge delay time
I/O access time
I/O hold time
I/O space pre-charge delay time
MCDIR hold time
DATA invalid delay time
EP9315
Enhanced Universal Platform SOC Processor
Symbol
tADs
tA
tH
tp
tA
tH
tp
tA
tH
tp
tMCDh
tDAfo
Min
0
[(AA + 1) × tHCLK] - 14
[(HA + 1) × tHCLK] - 3
(PA + 1) × tHCLK
[(AC + 1) × tHCLK] - 14
[(HC + 1) × tHCLK] - 3
(PC + 1) × tHCLK
[(AI + 1) × tHCLK] - 14
[(HI + 1) × tHCLK] - 3
(PI + 1) × tHCLK
0
0
Typ
-
(AA + 1) × tHCLK
(HA + 1) × tHCLK
(PA + 1) × tHCLK
(AC + 1) × tHCLK
(HC + 1) × tHCLK
(PC + 1) × tHCLK
(AI + 1) × tHCLK
(HI + 1) × tHCLK
(PI + 1) × tHCLK
-
-
Max
-
-
-
-
-
-
-
-
-
-
-
-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tADs
AD
MCEHn/
MCELn/
MCREGn
tp
tA
MCWRn/
IOWRn
MCDIR
DA
(out)
MCWAITn (see Note 1)
Figure 18. PCMCIA Write Cycle Timing Measurement
Note: 1 - MCWAITn asserted will extend the MCWR / IOWR strobe time.
tH
tMCDh
tDAfo
DS638PP4
©Copyright 2005 Cirrus Logic (All Rights Reserved)
31