CS4351 Datasheet, PDF (24/41 Pages) Cirrus Logic – 192 kHz STEREO DAC WITH 2 Vrms LINE OUT

CS4351
1) Initiate a START condition to the I²C bus followed by the address byte. The upper 6 bits
must be 100110. The seventh bit must match the setting of the AD0 pin, and the eighth must be
1. The eighth bit of the address byte is the R/W bit.
2) After transmitting an acknowledge (ACK), the device will then transmit the contents of the
register pointed to by the MAP. The MAP register will contain the address of the last register
written to the MAP, or the default address (see section 4.10.2) if an I²C read is the first opera-
tion performed on the device.
3) Once the device has transmitted the contents of the register pointed to by the MAP, issue an
ACK.
4) If the INCR bit is set to 1, the device will continue to transmit the contents of successive
registers. Continue providing a clock and issue an ACK after each byte until all the desired reg-
isters are read, then initiate a STOP condition to the bus.
5) If the INCR bit is set to 0 and further I²C reads from other registers are desired, it is necessary
to initiate a repeated START condition and follow the procedure detailed from steps 1 and 2
from the I²C Write instructions followed by step 1 of the I²C Read section. If no further reads
from other registers are desired, initiate a STOP condition to the bus.
NOTE
SDA
100110
AD0
R/W ACK
DATA
1-8
ACK
DATA
1-8
ACK
SCL
S ta rt
Stop
NOTE: If operation is a write, this byte contains the Memory Address Pointer, MAP. If
operation is a read, this byte contains the data of the register pointed to by the MAP.
Figure 9. Control Port Timing, I²C Mode
4.9.3 SPI Mode
In SPI mode, data is clocked into the serial control data line, CDIN, by the serial control port clock,
CCLK (see Figure 10 for the clock to data relationship). There is no AD0 pin. Pin CS is the chip
select signal and is used to control SPI writes to the control port. When the device detects a high to
low transition on the AD0/CS pin after power-up, SPI mode will be selected. All signals are inputs
and data is clocked in on the rising edge of CCLK.
4.9.3.1 SPI Write
To write to the device, follow the procedure below while adhering to the control port Switching
Specifications in Section 7.
1) Bring CS low.
2) The address byte on the CDIN pin must then be 10011000.
3) Write to the memory address pointer, MAP. This byte points to the register to be written.
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DS566PP2