CS4364 Datasheet, PDF (21/50 Pages) Cirrus Logic – 103 dB, 192 kHz 6-Channel D/A Converter

CS4364
3.2 Mode Select
In hardware mode operation is determined by the Mode Select pins. The state of these pins are continually
scanned for any changes. These pins require connection to supply or ground as outlined in Figure 8. For
M0, M1, M2 supply is VLC and for M3 and M4 supply is VLS. Tables 4 - 6 show the decode of these pins.
In software mode, the operational mode and data format are set in the FM and DIF registers.
M1
(DIF1)
0
0
1
1
M0
(DIF0)
0
1
0
1
DESCRIPTION
FORMAT
Left Justified, up to 24-bit data
0
I²S, up to 24-bit data
1
Right Justified, 16-bit Data
2
Right Justified, 24-bit Data
3
Table 4. PCM Digital Interface Format, Hardware Mode Options
FIGURE
9
10
11
12
M4 M3 M2 M1 M0
DESCRIPTION
(DEM)
0
0
0
Single-Speed without De-Emphasis (4 kHz to 50 kHz sample rates)
0
0
1
Single-Speed with 44.1 kHz De-Emphasis; see Figure 18
0
1
0
Double-Speed (50 kHz to 100 kHz sample rates)
0
1
1
Table 4 _{Quad-Speed (100 kHz to 200 kHz sample rates)}
1
0
0
Auto Speed-Mode Detect (32 kHz to 200 kHz sample rates)
1
0
1
Auto Speed-Mode Detect with 44.1 kHz De-Emphasis; see Figure 18
1
1
Table 6
DSD Processor Mode
Table 5. Mode Selection, Hardware Mode Options
M2
M1
M0
DESCRIPTION
0
0
0
64x oversampled DSD data with a 4x MCLK to DSD data rate
0
0
1
64x oversampled DSD data with a 6x MCLK to DSD data rate
0
1
0
64x oversampled DSD data with a 8x MCLK to DSD data rate
0
1
1
64x oversampled DSD data with a 12x MCLK to DSD data rate
1
0
0
128x oversampled DSD data with a 2x MCLK to DSD data rate
1
0
1
128x oversampled DSD data with a 3x MCLK to DSD data rate
1
1
0
128x oversampled DSD data with a 4x MCLK to DSD data rate
1
1
1
128x oversampled DSD data with a 6x MCLK to DSD data rate
Table 6. Direct Stream Digital (DSD), Hardware Mode Options
DS619A1
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