CS4228 Datasheet, PDF (20/30 Pages) Cirrus Logic – 24-Bit, 96 kHz Surround Sound Codec

CS4228
Chip Control
Address 0x02
7
DIGPDN
1
DIGPDN
ADCPDN
DACPDN12
DACPDN34
DACPDN56
6
5
RESERVED
0
0
4
ADCPDN
0
3
DACPDN56
0
2
DACPDN34
0
1
DACPDN12
0
0
RESERVED
0
Power down the digital portions of the CODEC
0 - Digital power down.
*1 - Normal operation
Power down the analog section of the ADC
*0 - Normal
1 - ADC power down.
Power down the analog section of DAC 1&2
*0 - Normal
1 - Power down DAC 1&2.
Power down the analog section of DAC 3&4
*0 - Normal
1 - Power down DAC 3&4.
Power down the analog section of DAC 5&6
*0 - Normal
1 - Power down DAC 5&6.
ADC Control
Address 0x03
7
MUTL
0
MUTL, MUTR
HPF
HPFZ
6
5
4
3
2
1
0
MUTR
HPF
HPFZ
RESERVED
0
0
0
0
0
0
0
ADC left and right channel mute control
*0 - Normal
1 - Selected ADC output muted
ADC DC offset removal. See “High Pass Filter” on page 12 for more information
*0 - Enabled
1 - Disabled
ADC DC offset averaging freeze. See “High Pass Filter” on page 12 for more information
*0 - Normal. The DC offset average is dynamically calculated and subtracted from incoming
ADC data.
1 - Freeze. The DC offset average is frozen at the current value and subtracted from
incoming ADC data. Allows passthru of DC information.
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DS307PP1