SHC605 Datasheet, PDF (11/15 Pages) Burr-Brown (TI) – High-Speed Operational TRACK-AND-HOLD AMPLIFIER

125Ω
+5V
1µF
.01µF
R₂
V_IN
249Ω
1 +In
2 +V_S
3 +V_S
4 DGND
–V_S 16
–V_S 15
Lock 14
Lock 13
5 AGND Hold 12
6 AGND Hold 11 NC
7 AGND Select 10
8 –In
V_OUT 9
R₁
.01µF
–5V
1µF
Hold
+5V = TTL
–5V = ECL
V_OUT
249Ω
V_{OUT = –} R₁
V_IN
R₂
FIGURE 5. Gain of –1 Track-and-Hold Amplifier.
V_+IN
+5V
1µF
V_–IN
249Ω
R₂
249Ω
.01µF
249Ω
R₂
R₁
1 +In
2 +V_S
3 +V_S
4 DGND
–V_S 16
–V_S 15
Lock 14
Lock 13
.01µF
–5V
1µF
5 AGND Hold 12
Hold
6 AGND Hold 11 NC
7 AGND Select 10
+5V = TTL
–5V = ECL
8 –In
V_OUT 9
V_OUT
R₁
249Ω
V_OUT
= (V_+IN – V_–IN)
R₁
R₂
FIGURE 6. Differential Gain of 1 Track-and-Hold Amplifier.
APPLICATIONS INFORMATION
LOGIC COMPATIBILITY/TRACK-TO-HOLD
SWITCHING
The SHC605 contains an internal reference circuit which
produces either an ECL or TTL logic threshold voltage for
single-ended track-to-hold switching. Differential ECL
switching is also possible with the SHC605. Table I provides
the proper pin connections for all of the possible switching
options and the Performance Specifications Table gives the
logic levels and input bias currents.
LOGIC TYPE
Single-ended TTL
Single-ended ECL
Differential ECL
DGND
(Pin 4)
GND
GND
NC
SELECT
(Pin 10)
+5V
–5V
NC
THRESH/HOLD HOLD
(Pin 11)
(Pin 12)
NC
NC
Clock
Clock
Clock
Clock
TABLE I. Track-to-Hold Switching Options.
LOCKOUT CIRCUITRY
The SHC605 includes additional logic circuitry which al-
lows edge-triggered operation for sampling ADCs. The
lockout comparator and Track/Hold comparator form a wired-
or mode control circuit as shown in the block diagram on
page one. When the Lock input, pin 14, is high with respect
to the Lock input, pin 13, the SHC605 is in the Hold-mode
regardless of the Hold/Hold inputs. This feature provides
more flexibility in the convert command duty cycle and
reduces noise resulting from aperture jitter.
Figure 7 shows how the SHC605 lockout circuit can be used
with an ECL one-shot to provide an edge-triggered sampling
ADC. An ECL threshold voltage is generated on Thresh/
Hold (Pin 11), which is connected to Lock (Pin 13), to allow
a single-ended lockout input on Lock (Pin 14). The ECL
convert command is applied directly to the SHC605. The
10ns delay on the ADCs convert signal is to allow for
SHC605 track-to-hold settling. The one-shot’s duty cycle
+5V
1µF
V_IN
.01µF
1 +In
2 +V_S
3 +V_S
4 DGND
–V_S 16
–V_S 15
Lock 14
Lock 13
5 AGND Hold 12
6 AGND Hold 11
7 AGND Select 10
8 –In
V_OUT 9
.01µF
V_OUT
–5V
1µF
ECL Convert Command
(10ns minimum pulsewidth)
ECL
One-Shot
10ns
Delay
Line
HOLD
0
0
1
1
LOCK
0
1
0
1
Convert
ADC
Digital
Output
MODE
Track
Hold
Hold
Hold
50Ω
FIGURE 7. Edge-Triggered ADC.
11
®
SHC605