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HDSP-2533 Datasheet, PDF (7/15 Pages) AVAGO TECHNOLOGIES LIMITED – Eight Character 5 mm Smart Alphanumeric Display
Electrical Description
Pin Function
RESET (RST,pin 1)
FLASH (FL, pin 2)
ADDRESS INPUTS
(A0-A4, pins 3-6, 10)
Description
Reset initializes the display.
FL low indicates an access to the Flash RAM and is unaffected by the state of address
lines A3-A4.
Each location in memory has a distinct address. Address inputs (A0-A2) select a specific
location in the Character RAM, the Flash RAM or a particular row in the UDC (User-
Defined Character) RAM. A3-A4 are used to select which section of memory is accessed.
Table 1 shows the logic levels needed to access each section of memory.
Table 1. Logic Levels to Access Memory
FL
A4
A3
Section of Memory
0
X
X
Flash RAM
1
0
0
UDC Address Register
1
0
1
UDC RAM
1
1
0
Control Word Register
1
1
1
Character RAM
A2 A1 A0
Character Address
Don’t Care
Row Address
Don’t Care
Character Address
CLOCK SELECT (CLS, pin 11)
CLOCK INPUT/OUTPUT
(CLK, pin 12)
WRITE (WR, pin 13)
CHIP ENABLE (CE, pin 14)
READ (RD, pin 19)
DATA Bus
(D0-D7, pins 20, 21, 25-30)
GND (SUPPLY) (pin 16)
GND (LOGIC) (pin 18)
VDD (POWER) (pin 15)
Thermal Test (pin 17)
This input is used to select either an internal (CLS = 1) or external (CLS = 0) clock source.
Outputs the master clock (CLS = 1) or inputs a clock (CLS = 0) for slave displays.
Data is written into the display when the WR input is low and the CE input is low.
This input must be at a logic low to read or write data to the display and must go high
between each read and write cycle.
Data is read from the display when the RD input is low and the CE input is low.
The Data bus is used to read from or write to the display.
This is the analog ground for the LED drivers.
This is the digital ground for internal logic.
This is the positive power supply input.
This pin is used to measure the IC junction temperature. Do not connect.