HFBR-5961ALZ Datasheet, PDF (5/13 Pages) AVAGO TECHNOLOGIES LIMITED – Multimode Small Form Factor (SFF) Transceivers for ATM, FDDI, Fast Ethernet and SONET OC-3/SDH STM-1 with LC connector

Board Layout - Hole Pattern
The Avago transceiver complies with the circuit board
“Common Transceiver Footprint” hole pattern defined in
the original multisource announcement which defined
the 2 x 5 package style.This drawing is reproduced in
Figure 6 with the addition of ANSI Y14.5M compliant
dimensioning to be used as a guide in the mechani-
cal layout of your circuit board.Figure 6 illustrates the
recommended panel opening and the position of the
circuit board with respect to this panel.
Regulatory Compliance
These transceiver products are intended to enable
commercial system designers to develop equipment
that complies with the various international regula-
tions governing certification of Information Technology
Equipment. See the Regulatory Compliance Table for
details. Additional information is available from your
Avago sales representative.
TERMINATE AT
TRANSCEIVER INPUTS
VCC(+3.3 V)
130 Ω 130 Ω
10 nF
Z = 50 Ω
PHY DEVICE
VCC(+3.3 V)
TD-
Z = 50 Ω
TD+
LVPECL
10 9 8 7 6
82 Ω 82 Ω
TX
1 µH
VCC(+3.3 V)
10 µF
RX
C2
C3
VCC(+3.3 V)
10 nF
130 Ω
130 Ω
VCC(+3.3 V)
12345
1 µH
C1
Z = 50 Ω
Z = 50 Ω
Z = 50 Ω
RD+
LVPECL
RD-
VCC(+3.3 V)
10 nF _{82 Ω}
82 Ω
130 Ω
SD
LVTTL
82 Ω
Note:
C1 = C2 = C3 = 10 nF or 100 nF
* Loading R1 is optional.
Figure 4. Alternative Termination Circuits
TERMINATE AT DEVICE INPUTS