HFBR-59L1AGEZ Datasheet, PDF (13/13 Pages) AVAGO TECHNOLOGIES LIMITED – 1.25 GBd Ethernet and 1.0625 GBd Fibre Channel 850 nm SFF Low Voltage (3.3 V) Optical Transceiver

Ø 0.00 M A
20x
Ø
0.81
(0.032
± 0.10
± 0.004)
Ø 0.00 M A
4x
Ø_(0.10.5450
± 0.10
± 0.004)
(NOTE
5)
13.34
(0.525)
12.16
(0.479)
SEE DETAIL B
3.56
(0.140)
25.75
(1.014)
543 2 1
678 910
SEE NOTE 3
SEE DETAIL A
2x
Ø
2.29
(0.090)
MAX.
(AREA FOR
EYELETS)
2x
Ø _(0.10.5450
± 0.10
± 0.004)
(NO
TE
4)
Ø 0.00 M A
3.00
(0.118)
15.24
(0.600)
MINIMUM PITCH
7.59 10.16
(0.299) (0.400)
6.00
(0.236)
3.00
(0.118)
DETAIL A (3x)
1.80
(0.071)
4.57 (0.180)
7.11 (0.280)
8.89 (0.350)
9x
1.78
(0.070)
1.00
(0.039)
DETAIL B (4x)
1.00
+1.50
–0
(0.039
+0.059
–0.000
)
15.24
(0.600)
MIN.
PITCH
A
A
12
(0.472)
REF
.
MAX.
15.75
+0
–0.75
A
(0.620
+0.000
–0.030
)
14.22 ±0.10
(0.560 ±0.004)
10.16 ±0.10
(0.400 ±0.004)
TOP OF PCB
SECTION A-A
Notes:
1. This page describes the recommended circuit board layout and front panel openings for SFF transceivers.
2. The hatched areas are keep-out areas reserved for housing standoffs. No metal traces allowed in keep-out areas..
3. The drawing shows extra pin holes for 2x10 pin transceivers. These extra holes are not required for HFBR-59L1AL.
4. Holes for mounting studs must be tied to chassis ground.
5. Holes for housing leads mst be tied to signal ground.
6. Dimensions are in millimeters (inches).
Figure 6b. Recommended SFF host board and front panel layout
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Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries.
Data subject to change. Copyright © 2005-2010 Avago Technologies. All rights reserved. Obsoletes 5988-7944EN
AV02-2433EN - March 26, 2010