HCPL-0872-000E Datasheet, PDF (10/12 Pages) AVAGO TECHNOLOGIES LIMITED – Digital Interface IC

Pre-Trigger Mode
The pre-trigger mode refers to the operation of a PLL-
based circuit that affects the sampling behavior and
conversion time of the A/D converter when channel 1
is selected. The PLL pre-trigger circuit has two modes of
operation; the first mode allows more precise control of
the time at which the analog input voltage is effectively
sampled, while the second mode essentially eliminates
the time between when the external convert start
command is given and when output data is available
(reducing it to less than 1µs). A brief description of how
the A/D converter works with the pre-trigger circuit
disabled will help explain how the pre-trigger circuit
affects operation when it is enabled.
With the pre-trigger circuit is disabled (pre-trigger mode
0), Figure 4 illustrates the relationship between the
convert start command, the weighting function used to
average the modulator data, and the data ready signal.
The weighted averaging of the modulator data begins
immediately following the convert start command. The
weighting function increases for half of the conversion
cycle and then decreases back to zero, at which time the
data ready signal is given, completing the conversion
cycle. The analog signal is effectively sampled at the peak
of the weighting function, half-way through the conver-
sion cycle. This is the default mode.
If the convert start signal is periodic (i.e., at a fixed
frequency) and the PLL pre-trigger circuit is enabled (pre-
trigger modes 1 or 2), either the peak of the weighting
function or the end of the conversion cycle can be
aligned to the external convert start command, as shown
in Figure 4. The Digital Interface IC can therefore synchro-
nize the conversion cycle so that either the beginning, the
middle, or the end of the conversion is aligned with the
external convert start command, depending on whether
pre-trigger mode 0, 1, or 2 is selected, respectively. The
only requirement is that the convert start signal for
channel 1 be periodic. If the signal is not periodic and
pre-trigger mode 1 or 2 is selected, then the pre-trigger
circuit will not function properly.
An important distinction should be made concerning the
difference between conversion time and signal delay. As can
be seen in Figure 4, the amount of time from the peak of the
weighting function (when the input signal is being sampled)
to when output data is ready is the same for all three modes.
This is the actual delay of the analog signal through the
A/D converter and is independent of the “conversion time,”
which is simply the time between the convert start signal
and the data ready signal. Because signal delay is the true
measure of how much phase shift the A/D converter adds
to the signal, it should be used when making calculations of
phase margin and loop stability in feedback systems.
There are different reasons for using each of the pre-trigger
modes. If the signal is not periodic, then the pre-trigger
circuit should be disabled by selecting pre-trigger mode
0. If the most time-accurate sampling of the input signal
is desired, then mode 1 should be selected. If the shortest
possible conversion time is desired, then mode 2 should be
selected. The pre-trigger circuit functions only with channel
1; the circuit ignores any convert start signals while channel
2 is selected with the CHAN input. This allows conversions
on channel 2 to be performed between conversions on
channel 1 without affecting the operation of the pre-trigger
circuit. As long as the convert start signals are periodic
while channel 1 is selected, then the pre-trigger circuit will
function properly. The three different pre-trigger modes are
selected using bits 6 and 7 of register 3, as shown in Table
3 below.
WEIGHTING
FUNCTION
CONVERT START - CS
DATA READY - SDAT
A) PRE-TRIGGER MODE 0
B) PRE-TRIGGER MODE 1
Figure 4. Pre-Trigger Modes 0, 1, and 2.
10
C) PRE-TRIGGER MODE 2