HCTL-2001-A00 Datasheet, PDF (1/16 Pages) AVAGO TECHNOLOGIES LIMITED – Quadrature Decoder/Counter Interface ICs

HCTL-2001-A00, HCTL-2017-A00 / PLC,
HCTL-2021-A00 / PLC
Quadrature Decoder/Counter Interface ICs
Data Sheet
Description
The HCTL-2xx1(7)-A00/PLC is CMOS ICs that performs
the quadrature decoder, counter, and bus interface
function. The HCTL-2xx1(7)-A00/PLC is designed to
improve system performance in digital closed loop
motion control systems and digital data input systems.
It does this by shifting time intensive quadrature
decoder functions to a cost effective hardware solution.
The HCTL-2xx1(7)-A00/PLC consists of a quadrature
decoder logic, a binary up/down state counter, and an
8-bit bus interface. The use of Schmitt-triggered CMOS
inputs and input noise filters allows reliable operation
in noisy environments. The HCTL-2001-A00 contains
12-bit counter and HCTL-2017-A00/PLC or HCTL-2021-
A00/PLC contains 16-bit counter and provides TLL/
CMOS compatible tri-state output buffers. Operation
is specified for a temperature range from –40 to +85°C
at clock frequencies up to 14MHz.
The HCTL-2021-A00/PLC provides quadrature decoder
output signals and cascade signals for use with many
standard computer ICs.
Features
• Interfaces Encoder to Microprocessor
• 14 MHz Clock Operation
• High Noise Immunity:
• Schmitt Trigger Inputs and Digital Noise Filter
• 16-Bit Binary Up/Down Counter
• Latched Outputs
• 8-Bit Tristate Interface
• 8, 12 or 16-Bit Operating Modes
• Quadrature Decoder Output Signals, Up/Down and
Count
• Cascade Output Signals, Up/Down and Count
• Substantially Reduced System Software
• 5V Operation (V_DD – V_SS)
• TTL/CMOS Compatible I/O
• Operating Temperature: -40°C to 85°C
• 16-Pin PDIP, 20-Pin PDIP, 20-Pin PLCC
Applications
• Interface Quadrature Incremental Encoders to
Microprocessors
• Interface Digital Potentiometers to Digital Data
Input Buses
Part Number
HCTL-2001-A00
HCTL-2017-A00
HCTL-2017-PLC
HCTL-2021-A00
HCTL-2021-PLC
Description
14 MHz clock operation. 12-bit counter.
14 MHz clock operation. 16-bit counter.
14 MHz clock operation. 16-bit counter.
14 MHz clock operation. 16-bit counter.
Quadrature decoder output signals. Cascade output signals.
14 MHz clock operation. 16-bit counter.
Quadrature decoder output signals. Cascade output signals.
Pinout
PINOUT A
PINOUT A
PINOUT C
PINOUT B
Package
PACKAGE A
PACKAGE A
PACKAGE C
PACKAGE B
PINOUT D PACKAGE C